SLUS970B
NOVEMBER 2013 – December 2014
TPS40170
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
Simplified Application
Efficiency vs. Load Current
4
Revision History
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
Handling Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
LDO Linear Regulators and Enable
7.3.2
Input Undervoltage Lockout (UVLO)
7.3.2.1
Equations for Programming the Input UVLO:
7.3.3
Oscillator and Voltage Feed-Forward
7.3.3.1
Calculating the Timing Resistance (RRT)
7.3.4
Overcurrent Protection and Short-Circuit Protection (OCP and SCP)
7.3.5
Soft-Start and Fault-Logic
7.3.5.1
Soft-Start During Overcurrent Fault
7.3.5.2
Equations for Soft-Start and Restart Time
7.3.6
Over-Temperature Fault
7.3.7
Tracking
7.3.8
Adaptive Drivers
7.3.9
Start-Up into Pre-Biased Output
7.3.10
Powergood (PGOOD)
7.3.11
PGND and AGND
7.4
Device Functional Modes
7.4.1
Frequency Synchronization
7.4.2
Operation Near Minimum VIN (VVIN ≤ 4.5 V)
8
Application and Implementation
8.1
Application Information
8.1.1
Bootstrap Resistor
8.1.2
SW Node Snubber Capacitor
8.1.3
Input Resistor
8.1.4
LDRV Gate Capacitor
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Custom Design with WEBENCH Tools
8.2.2.2
List of Materials
8.2.2.3
Select a Switching Frequency
8.2.2.4
Inductor Selection (L1)
8.2.2.5
Output Capacitor Selection (C9)
8.2.2.6
Peak Current Rating of Inductor
8.2.2.7
Input Capacitor Selection (C1, C6)
8.2.2.8
MOSFET Switch Selection (Q1, Q2)
8.2.2.9
Timing Resistor (R7)
8.2.2.10
UVLO Programming Resistors (R2, R6)
8.2.2.11
Boot-Strap Capacitor (C7)
8.2.2.12
VIN Bypass Capacitor (C18)
8.2.2.13
VBP Bypass Capacitor (C19)
8.2.2.14
VDD Bypass Capacitor (C16)
8.2.2.15
SS Timing Capacitor (C15)
8.2.2.16
ILIM Resistor (R9, C17)
8.2.2.17
SCP Multiplier Selection (R5)
8.2.2.18
Feedback Divider (R10, R11)
8.2.2.19
Compensation: (R4, R13, C13, C14, C21)
8.2.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Custom Design with WEBENCH Tools
11.2
Device Support
11.2.1
Third-Party Products Disclaimer
11.2.2
Related Devices
11.3
Trademarks
11.4
Electrostatic Discharge Caution
11.5
Glossary
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RGY|20
MPQF116H
Thermal pad, mechanical data (Package|Pins)
RGY|20
QFND041R
Orderable Information
slus970b_oa
slus970b_pm
1
Features
Wide Input Voltage Range from 4.5 V to 60 V
600 mV Reference Voltage with 1% Accuracy
Programmable UVLO and Hysteresis
Voltage Mode Control With Voltage Feed Forward
Programmable Frequency Between 100 kHz and 600 kHz
Bi-directional -Frequency Synchronization With Master/Slave Option
Low-side FET Sensing Overcurrent Protection and High-Side FET Sensing Short-Circuit Protection With Integrated Thermal Compensation
Programmable Closed Loop Soft-Start
Supports Pre-Biased Outputs
Thermal Shutdown at 165°C with Hysteresis
Voltage Tracking
Powergood
ENABLE with 1-µA Low Current Shutdown
8.0-V and 3.3-V LDO Output
Integrated Bootstrap Diode
20-Pin 3.5 mm × 4.5 mm VQFN (RGY) Package
Create a
Custom Design with WEBENCH Tools