SLVSB43C November   2011  – February 2016 TPS54427

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 PWM Operation
      2. 7.3.2 PWM Frequency and Adaptive On-Time Control
      3. 7.3.3 Soft Start and Pre-Biased Soft Start
      4. 7.3.4 Current Protection
      5. 7.3.5 UVLO Protection
      6. 7.3.6 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Forced CCM Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Output Voltage Resistors Selection
        2. 8.2.2.2 Output Filter Selection
        3. 8.2.2.3 Input Capacitor Selection
        4. 8.2.2.4 Bootstrap Capacitor Selection
        5. 8.2.2.5 VREG5 Capacitor Selection
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
    3. 10.3 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Design Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

DDA Package
8-Pin SO PowerPAD
Top View
TPS54427 po_lvsb43.gif
DRC Package
10-Pin VSON
Top View
TPS54427 PO_DRC.gif

Pin Functions

PIN DESCRIPTION
NAME DDA DRC
EN 1 1 Enable input control. Active high and must be pulled up to enable the device.
VFB 2 2 Converter feedback input. Connect to output voltage with feedback resistor divider.
VREG5 3 3 5.5 V power supply output. A capacitor (typical 1 µF) should be connected to GND. VREG5 is not active when EN is low.
SS 4 4 Soft-start control. An external capacitor should be connected to GND.
GND 5 5 Ground pin. Power ground return for switching circuit. Connect sensitive SS and VFB returns to GND at a single point.
SW 6 6, 7 Switch node connection between high-side NFET and low-side NFET.
VBST 7 8 Supply input for the high-side FET gate drive circuit. Connect 0.1µF capacitor between VBST and SW pins. An internal diode is connected between VREG5 and VBST.
VIN 8 9, 10 Input voltage supply pin.
Exposed Thermal Pad Back side Thermal pad of the package. Must be soldered to achieve appropriate dissipation. Must be connected to GND.
Back side Thermal pad of the package. PGND power ground return of internal low-side FET. Must be soldered to achieve appropriate dissipation.