SLVS273A February   2000  – November 2015 TPS60140 , TPS60141

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagrams
    3. 9.3 Feature Description
      1. 9.3.1 Undervoltage Lockout
      2. 9.3.2 Low-Battery Detector (TPS60140 Only)
      3. 9.3.3 Power-Good Detector (TPS60141)
    4. 9.4 Device Functional Modes
      1. 9.4.1 Start-Up Procedure and Shutdown
      2. 9.4.2 Short-Circuit Protection
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Capacitor Selection
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
    3. 12.3 Power Dissipation
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Related Links
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

12 Layout

12.1 Layout Guidelines

Careful board layout is necessary due to the high transient currents and switching frequency of the converter. All capacitors should be soldered in close proximity to the IC. Connect ground and power ground terminals through a short, low-impedance trace. A PCB layout proposal for a two-layer board is given in Figure 19. The bottom layer of the board carries only ground potential for best performance. The layout also provides improved thermal performance as the exposed lead frame of the PowerPAD package is soldered to the PCB.

An evaluation module for the TPS60140 is available and can be ordered under product code TPS60140EVM−144. The EVM uses the layout shown in Figure 19.

12.2 Layout Example

TPS60140 TPS60141 recommended_component_placement_and_board_slvs273.gif Figure 19. Recommended Component Placement and Board Layout

Table 6. Component Identification

IC1 TPS6014x
C1, C2 Flying capacitors
C3, C6 Input capacitors
C4, C5 Output capacitors
C7 Stabilization capacitor for LBI
R1, R2 Resistive divider for LBI
R3 Pullup resistor for LBO

The best performance of the converter is achieved with additional bypass capacitors C5 and C6 at the input and output. Capacitor C7 should be included if the large line transients are expected. The capacitors are not required. They can be omitted in most applications.

12.3 Power Dissipation

The power dissipated in the TPS6014x depends mainly on input voltage and output current and is described by Equation 5:

Equation 5. TPS60140 TPS60141 Eq5_Pdiss_slvs273.gif

By observation of Equation 5, it can be seen that the power dissipation is worse for the highest input voltage VI and the highest output current IOUT. For an input voltage of 3.6 V and an output current of 100 mA, the calculated power dissipation P(DISS) is 580 mW. This is also the point where the charge pump operates with its lowest efficiency, which is only 45%, and hence with the highest power losses.

P(DISS) must be less than that allowed by the package rating. The thermal resistance junction to ambient of the thermally enhanced TSSOP is 178°C/W for an unsoldered package. The thermal resistance junction to case, with the exposed thermal pad soldered to an infinitive heat sink, is 3.5°C/W.

With the recommended maximum junction temperature of 125°C and an assumed maximum ambient operating temperature of 85°C, the maximum allowed thermal resistance junction to ambient of the system can be calculated using Equation 6.

Equation 6. TPS60140 TPS60141 Eq6_Rtheta_slvs273.gif

Using a board layout as described in the application information section, RθJA is typically 56°C/W for an unsoldered PowerPAD™ and 41°C/W for a soldered PowerPAD.

For more information, refer to the PowerPAD application report, PowerPAD™ Thermally Enhanced Package (SLMA002).