UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.
For all switching power supplies, the layout is an important step in the design, especially at high peak currents and high switching frequencies. If the layout is not carefully done, the regulator could show stability problems as well as EMI problems. Therefore, use wide and short traces for the main current path and for the power ground tracks. The input capacitor, output capacitor, and the inductor should be placed as close as possible to the IC. Use a common ground node for power ground and a different one for control ground to minimize the effects of ground noise. Connect these ground nodes at the GND pin of the IC. The most critical current path for all boost converters is from the switching FET, through the synchronous FET, then the output capacitors, and back to ground of the switching FET. Therefore, the output capacitors and their traces should be placed on the same board layer as the IC and as close as possible between the IC’s VOUT and GND pin.
See Figure 37 for the recommended layout.
Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added heat sinks and convection surfaces, and the presence of other heat-generating components affect the power-dissipation limits of a given component.
Two basic approaches for enhancing thermal performance are listed below.
For more details on how to use the thermal parameters in the dissipation ratings table please check the application report Thermal Characteristics of Linear and Logic Packages Using JEDEC PCB Designs (SZZA017) and the application report Semiconductor and IC Package Thermal Metrics (SPRA953).