SLVSCZ5B July   2016  – October 2018 TPS61230A

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Application
      2.      Efficiency
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Startup
      2. 7.3.2 Enable and Disable
      3. 7.3.3 Under-Voltage Lockout (UVLO)
      4. 7.3.4 Current Limit Operation
      5. 7.3.5 Over Voltage Protection
      6. 7.3.6 Load Disconnect
      7. 7.3.7 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 PWM Mode
      2. 7.4.2 PFM Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 TPS61230A 2.5-V to 4.5-V Input, 5-V Output Converter
        1. 8.2.1.1 TPS61230A 5-V Output Design Requirements
        2. 8.2.1.2 TPS61230A 5-V Detailed Design Procedure
          1. 8.2.1.2.1 Programming The Output Voltage
          2. 8.2.1.2.2 Inductor and Capacitor Selection
            1. 8.2.1.2.2.1 Inductor Selection
            2. 8.2.1.2.2.2 Output Capacitor Selection
            3. 8.2.1.2.2.3 Input Capacitor Selection
          3. 8.2.1.2.3 Loop Stability, Feed Forward Capacitor
        3. 8.2.1.3 TPS61230A 5-V Output Application Performance Plots
      2. 8.2.2 Systems Example - TPS61230A with Feed Forward Capacitor for Best Transient Response
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.1.2.2.2 Output Capacitor Selection

For the output capacitor, it is recommended to use small X5R or X7R ceramic capacitors placed as close as possible to the VOUT and GND pins of the IC. If, for any reason, the application requires the use of large capacitors which can not be placed close to the IC, using a smaller ceramic capacitor of 1 µF in parallel to the large one is highly recommended. This small capacitor should be placed as close as possible to the VOUT and GND pins of the IC.

Care must be taken when evaluating a capacitor’s derating under bias. The bias can significantly reduce capacitance. Ceramic capacitors can loss as much as 50% of their capacitance at rated voltage. Therefore, leave margin on the voltage rating to ensure adequate effective capacitance.

The ESR impact on the output ripple must be considered as well, if tantalum or electrolytic capacitors are used. Assuming there is enough capacitance such that the ripple due to the capacitance can be ignored, the ESR needed to limit the VRipple is:

Equation 6. TPS61230A EQ_ESR.gif