SLVSCK4A September   2015  – May 2016 TPS61235P , TPS61236P


  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Boost Controller Operation
      2. 8.3.2  Soft Start
      3. 8.3.3  Enable and Disable
      4. 8.3.4  Constant Output Voltage and Constant Output Current Operations
        1. Constant Voltage Operation
        2. Output Current Monitor
        3. Constant Current Operation
      5. 8.3.5  Over Current Protection
      6. 8.3.6  Load Status Indication
      7. 8.3.7  Under voltage Lockout
      8. 8.3.8  Over Voltage Protection and Reverse Current Block
      9. 8.3.9  Short Circuit Protection
      10. 8.3.10 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 PWM Mode
      2. 8.4.2 PFM Mode
      3. 8.4.3 CV Mode and CC Mode
  9. Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 TPS61236P 3-V to 4.35-V Input, 5-V Output Voltage, 3-A Maximum Output Current
        1. Design Requirements
        2. Detailed Design Procedure
          1. Programming the Output Voltage
          2. Program the Constant Output Current
          3. Inductor and Capacitor Selection
            1. Inductor Selection
            2. Output Capacitor Selection
            3. Input Capacitor Selection
          4. Loop Stability, Feed Forward Capacitor
          5. INACT Pin Pull-up Resistor
        3. TPS61236P 5-V Output Application Curves
      2. 9.2.2 TPS61236P 2.3-V to 5-V Input, 5-V 2-A Output Converter
        1. Design Requirements
        2. Detailed Design Procedure
        3. TPS61236P 5-V Output Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Related Links
    4. 12.4 Receiving Notification of Documentation Updates
    5. 12.5 Community Resources
    6. 12.6 Trademarks
    7. 12.7 Electrostatic Discharge Caution
    8. 12.8 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11 Layout

11.1 Layout Guidelines

For all switching power supplies, layout is an important step in the design, especially at high peak currents and high switching frequencies. If the layout is not carefully done, the regulator could show stability problems as well as EMI problems. Therefore, use wide and short traces for the main current paths and the power ground tracks. The input capacitor, output capacitor, and the inductor should be placed as close as possible to the IC. Use a common ground node for power ground and a different one for control/analog ground to minimize the effects of ground noise. Connect these ground nodes near the ground pins of the IC. The most critical current path for all boost converters is from the switching FET, through the synchronous FET, the output capacitors, and back to the ground of the switching FET. Therefore, the output capacitors and their traces should be placed on the same board layer as the IC and as close as possible between the VOUT and PGND pins of the IC.

See Figure 39 for the recommended layout.

11.2 Layout Example

The bottom layer is a large GND plane connected by vias.

TPS61235P TPS61236P TPS61236_layout.gif Figure 39. Layout Recommendation

11.3 Thermal Considerations

The maximum IC junction temperature should be restricted to 125°C under normal operating conditions. Calculate the maximum allowable dissipation, PD(max), and keep the actual power dissipation less than or equal to PD(max). The maximum power dissipation limit is determined using:

Equation 9. TPS61235P TPS61236P EQ_thermal.gif


TA is the maximum ambient temperature for the application.

RθJA is the junction-to-ambient thermal resistance given in the Thermal Information table.

The TPS6123x handles high power conversion so requires special attention to the power dissipation. The junction-to-ambient thermal resistance of a package in an application greatly depends on the PCB type and layout, and many system-dependent factors such as thermal coupling, airflow, added heat sinks and convection surfaces, and the presence of other heat-generating components also affect the power-dissipation limits.

Two common basic approaches to enhancing thermal performance are listed below.

  • Increase the power dissipation capability of the PCB. It is necessary to have sufficient copper area as heat sinks. For DC voltage nodes like VIN, VOUT, and PGND, make the copper area as large as possible. Multiple vias are helpful in further reducing thermal stress. It is also a good practice to have thick copper layers in order to minimize the PCB conduction loss and thermal impedance.
  • Introduce airflow in the system.

For more details on how to use the thermal parameters in the Thermal Information table, check the Thermal Characteristics Application Note (SZZA017) and the IC Package Thermal Metrics Application Note (SPRA953).