SLVS294F September   2000  – August 2015 TPS62000 , TPS62002 , TPS62003 , TPS62004 , TPS62005 , TPS62006 , TPS62007 , TPS62008

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Low Noise Antiringing Switch
      2. 8.3.2 Enable
      3. 8.3.3 Undervoltage Lockout
      4. 8.3.4 Power Good Comparator
    4. 8.4 Device Functional Modes
      1. 8.4.1 Soft Start
      2. 8.4.2 Synchronization, Power Save Mode, and Forced PWM Mode
      3. 8.4.3 100% Duty Cycle Operation
      4. 8.4.4 No Load Operation
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
        2. 9.2.2.2 Output Capacitor Selection
        3. 9.2.2.3 Input Capacitor Selection
      3. 9.2.3 Application Curves
    3. 9.3 System Examples
      1. 9.3.1 Standard 5-V to 3.3-V/600-mA Conversion; High Efficiency
      2. 9.3.2 Single Li-ion to 2.5-V/600-mA Using Ceramic Capacitors Only
      3. 9.3.3 Single Li-ion to 1.8 V/300 mA; Smallest Solution Size
      4. 9.3.4 Dual Cell NiMH or NiCd to 1.2 V/200 mA; Smallest Solution Size
      5. 9.3.5 Dynamic Output Voltage Programming As Used in Low Power DSP Applications
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Community Resources
    3. 12.3 Related Links
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DGS|10
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Specifications

7.1 Absolute Maximum Ratings

Over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Supply voltages on pin VIN and FC(2) –0.3 6 V
Voltages on pins EN, ILIM, SYNC, PG, FB, L(2) –0.3 VIN + 0.3 V
Peak switch current 1.6 A
TJ Operating junction temperature –40 150 °C
Lead temperature (soldering, 10 sec) 260 °C
Tstg Storage temperature –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged device model (CDM), per JEDEC specification JESD22-C101(2) ±1000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

Over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VIN Supply voltage 2 5.5 V
VOUT Output voltage range for adjustable output voltage version 0.8 VIN V
IOUT Output current for 3-cell operation (VIN ≥ 2.5 V; L = 10 μH, f = 750 kHz) 600 mA
IOUT Output current for 2-cell operation (VIN ≥ 2 V; L = 10 μH, f = 750 kHz) 200 mA
L Inductor(1) (see Note 2) 10 μH
CIN Input capacitor(1) 10 μF
COUT Output capacitor(1) (VOUT ≥ 1.8 V) 10 μF
COUT Output capacitor(1) VOUT < 1.8 V) 47 μF
TA Operating ambient temperature –40 85 °C
TJ Operating junction temperature –40 125 °C
(1) Refer to Application Information section for further information.

7.4 Thermal Information

THERMAL METRIC(1) TPS6200x UNIT
DGS [VSSOP]
10 PINS
RθJA Junction-to-ambient thermal resistance 160 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 51 °C/W
RθJB Junction-to-board thermal resistance 73 °C/W
ψJT Junction-to-top characterization parameter 5.0 °C/W
ψJB Junction-to-board characterization parameter 72 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

7.5 Electrical Characteristics

Over recommended operating free-air temperature range, VIN = 3.6 V, VOUT = 2.5 V, IOUT = 300 mA, EN = VIN, ILIM = VIN, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY CURRENT
VIN Input voltage range IOUT = 0 mA to 600 mA 2.5 5.5 V
IOUT = 0 mA to 200 mA 2 5.5
I(Q) Operating quiescent current IOUT = 0 mA, SYNC = GND (PFM-mode enabled) 50 75 μA
I(SD) Shutdown current EN = GND 0.1 1 μA
ENABLE
VIH EN high-level input voltage 1.3 V
VIL EN low-level input voltage 0.4 V
Ilkg EN input leakage current EN = GND or VIN 0.01 0.1 μA
V(UVLO) Undervoltage lockout threshold 1.2 1.6 1.95 V
POWER SWITCH AND CURRENT LIMIT
RDS(on) P-channel MOSFET on-resistance VIN = VGS = 3.6 V, I = 200 mA 200 280 410 mΩ
VIN = VGS = 2 V, I = 200 mA 480
P-channel leakage current VDS = 5.5 V 1 μA
N-channel MOSFET on-resistance VIN = VGS = 3.6 V, IOUT = 200 mA 200 280 410 mΩ
VIN = VGS = 2 V, IOUT = 200 mA 500
N-channel leakage current VDS = 5.5 V 1 μA
I(LIM) P-channel current limit 2.5 V ≤ VIN ≤ 5.5 V, ILIM = VIN 800 1200 1600 mA
2 V ≤ VIN ≤ 5.5 V, ILIM = GND 390 600 900
VIH ILIM high-level input voltage 1.3 V
VIL ILIM low-level input voltage 0.4 V
Ilkg ILIM input leakage current ILIM = GND or VIN 0.01 0.1 μA
POWER GOOD OUTPUT (see (1))
V(PG) Power good threshold Feedback voltage falling 88% VOUT 92% VOUT 94% VOUT V
Power good hysteresis 2.5% VOUT V
VOL PG output low voltage V(FB) = 0.8 × VOUT nominal, I(sink) = 10 μA 0.3 V
Ilkg PG output leakage current V(FB) = VOUT nominal 0.01 1 μA
Minimum supply voltage for valid power good signal 1.2 V
OSCILLATOR
fs Oscillator frequency 500 750 1000 kHz
f(SYNC) Synchronization range CMOS-logic clock signal on SYNC pin 500 1000 kHz
VIH SYNC high level input voltage 1.3 V
VIL SYNC low level input voltage 0.4 V
Ilkg SYNC input leakage current SYNC = GND or VIN 0.01 0.1 μA
Duty cycle of external clock signal 20% 60%
VO Adjustable output voltage range TPS62000 0.8 5.5 V
Vref Reference voltage TPS6200x 0.45 V
VOUT Fixed output voltage TPS62000 adjustable VIN = 2.5 V to 5.5 V; 0 mA ≤ IOUT ≤ 600 mA –3% 4% V
10 mA < IOUT ≤ 600 mA –3% 3%
TPS62001 0.9 V VIN = 2.5 V to 5.5 V; 0 mA ≤ IOUT ≤ 600 mA –3% 4%
10 mA < IOUT ≤ 600 mA –3% 3%
TPS62002
1 V		 VIN = 2.5 V to 5.5 V; 0 mA ≤ IOUT ≤ 600 mA –3% 4%
10 mA < IOUT ≤ 600 mA –3% 3%
TPS62003
1.2 V		 VIN = 2.5 V to 5.5 V; 0 mA ≤ IOUT ≤ 600 mA –3% 4%
10 mA < IOUT ≤ 600 mA –3% 3%
TPS62004
1.5 V		 VIN = 2.5 V to 5.5 V; 0 mA ≤ IOUT ≤ 600 mA –3% 4%
10 mA < IOUT ≤ 600 mA –3% 3%
TPS62005
1.8 V		 VIN = 2.5 V to 5.5 V; 0 mA ≤ IOUT ≤ 600 mA –3% 4%
10 mA < IOUT ≤ 600 mA –3% 3%
TPS62008
1.9 V		 VIN = 2.5 V to 5.5 V; 0 mA ≤ IOUT ≤ 600 mA –3% 4%
10 mA < IOUT ≤ 600 mA –3% 3%
TPS62006
2.5 V		 VIN = 2.7 V to 5.5 V; 0 mA ≤ IOUT ≤ 600 mA –3% 4%
10 mA < IOUT ≤ 600 mA –3% 3%
TPS62007
3.3 V		 VIN = 3.6 V to 5.5 V; 0 mA ≤ IOUT ≤ 600 mA –3% 4%
10 mA < IOUT ≤ 600 mA –3% 3%
Line regulation VIN = VOUT + 0.5 V (min. 2 V) to 5.5 V, IOUT = 10 mA 0.05 %/V
Load regulation VIN = 5.5 V; IOUT = 10 mA to 600 mA 0.6%
η Efficiency VIN = 5 V; VOUT = 3.3 V; IOUT = 300 mA 95%
VIN = 3.6 V; VOUT = 2.5 V; IOUT = 200 mA
Start-up time IOUT = 0 mA, time from active EN to VOUT 0.4 2 ms
(1) Power good is not valid for the first 100 μs after EN goes high. Refer to the application section for more information.

7.6 Typical Characteristics

TPS62000 TPS62001 TPS62002 TPS62003 TPS62004 TPS62005 TPS62006 TPS62007 TPS62008 dv_io_lvs294.gifFigure 1. Dropout Voltage vs Load Current
TPS62000 TPS62001 TPS62002 TPS62003 TPS62004 TPS62005 TPS62006 TPS62007 TPS62008 iq2_vi_lvs294.gifFigure 3. Operating Quiescent Current vs Input Voltage (Forced PWM)
TPS62000 TPS62001 TPS62002 TPS62003 TPS62004 TPS62005 TPS62006 TPS62007 TPS62008 iq_vi_lvs294.gifFigure 2. Operating Quiescent Current vs Input Voltage (Power Save Mode)
TPS62000 TPS62001 TPS62002 TPS62003 TPS62004 TPS62005 TPS62006 TPS62007 TPS62008 osc_ta_lvs294.gifFigure 4. Oscillator Frequency vs Free-Air Temperature