SLVSGO6A december   2022  – august 2023 TPS631010 , TPS631011

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Rating
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics 
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Undervoltage Lockout (UVLO)
      2. 8.3.2 Enable and Soft Start
      3. 8.3.3 Adjustable Output Voltage
      4. 8.3.4 Mode Selection (PFM/FPWM)
      5. 8.3.5 Output Discharge
      6. 8.3.6 Reverse Current Operation
      7. 8.3.7 Protection Features
        1. 8.3.7.1 Input Overvoltage Protection
        2. 8.3.7.2 Output Overvoltage Protection
        3. 8.3.7.3 Short Circuit Protection
        4. 8.3.7.4 Thermal Shutdown
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
        2. 9.2.2.2 Output Capacitor Selection
        3. 9.2.2.3 Input Capacitor Selection
        4. 9.2.2.4 Setting the Output Voltage
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
      2. 10.1.2 Development Support
        1. 10.1.2.1 Custom Design with WEBENCH Tools
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

GUID-20221124-SS0I-M2ZQ-1FPN-MPM9QMG6SDK6-low.svg Figure 6-1 8-Pin YBG WCSP Package(Top View)
Table 6-1 Pin Functions
PIN I/O(1) DESCRIPTION
NAME NO.
VIN

A1

 PWR Supply input voltage

EN

A2

 I Device enable. Set High to enable and Low to disable. It must not be left floating.
LX1

B1

 PWR Inductor switching node of the buck stage
MODE B2 I PFM/PWM selection. Set Low for power save mode, set High for forced PWM. It must not be left floating.
LX2

C1

 PWR Inductor switching node of the boost stage

GND

C2

 PWR Power ground

VOUT

D1

 PWR Power stage output

FB

D2

I

 Voltage feedback. Sensing pin
(1) PWR = power, I = input