SLVSBB2E May   2012  – March 2017 TPS65131-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Power Conversion
      2. 8.3.2 Control
      3. 8.3.3 Output Rails Enable or Disable
      4. 8.3.4 Load Disconnect
      5. 8.3.5 Soft Start
      6. 8.3.6 Overvoltage Protection
      7. 8.3.7 Undervoltage Lockout
      8. 8.3.8 Overtemperature Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-Save Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 TPS65131-Q1 With VPOS = 10.5 V, VNEG = -10 V
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Programming the Output Voltage
            1. 9.2.1.2.1.1 Boost Converter
            2. 9.2.1.2.1.2 Inverting Converter
          2. 9.2.1.2.2 Inductor Selection
          3. 9.2.1.2.3 Capacitor Selection
            1. 9.2.1.2.3.1 Input Capacitor
            2. 9.2.1.2.3.2 Output Capacitors
          4. 9.2.1.2.4 Rectifier Diode Selection
          5. 9.2.1.2.5 External P-MOSFET Selection
          6. 9.2.1.2.6 Stabilizing the Control Loop
            1. 9.2.1.2.6.1 Feedforward Capacitors
            2. 9.2.1.2.6.2 Compensation Capacitors
        3. 9.2.1.3 Analog Supply Input Filter
          1. 9.2.1.3.1 RC-Filter
          2. 9.2.1.3.2 LC-Filter
        4. 9.2.1.4 Thermal Information
        5. 9.2.1.5 Application Curves
      2. 9.2.2 TPS65131-Q1 With VPOS = 5.5 V, VNEG = -5 V
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Application Curves
      3. 9.2.3 TPS65131-Q1 With VPOS = 15 V, VNEG = -15 V
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11 Layout

11.1 Layout Guidelines

As for all switching power supplies, the layout is an important step in the design, especially at high peak currents and high switching frequencies. Improper layout might show the symptoms of poor line or load regulation, ground and output voltage shifts, stability issues, unsatisfying EMI behavior or worsened efficiency. Therefore, use wide and short traces for the main current paths and for the power ground tracks. The input capacitors (C1, C2, C3), output capacitors (C4, C5), the inductors (L1, L2), and the rectifying diodes (D1, D2) should be placed as close as possible to the IC to keep parasitic inductances low. Use a wide PGND plane. Connect the analog ground pin (AGND) to the PGND plane. Further, connect the PGND plane with the exposed thermal pad. Place the feedback dividers as close as possible to the control pin (boost converter) or the VREF pin (inverting converter) of the IC.

Figure 42 provides an layout example which is recommended to be followed.

11.2 Layout Example

TPS65131-Q1 Layout.gif Figure 42. TPS65131-Q1 Layout Recommendation