SLVSBC9C March   2012  – February 2016 TPS65177 , TPS65177A

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing Characteristics
    7. 6.7 I2C Timing Diagram
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power-Up
        1. 7.3.1.1 TPS65177
        2. 7.3.1.2 TPS65177A
      2. 7.3.2 Power-Down
      3. 7.3.3 Thermal Shutdown
      4. 7.3.4 Undervoltage Lockout
      5. 7.3.5 Short-Circuit and Overload Protection
        1. 7.3.5.1 Boost Converter (V(AVDD)):
        2. 7.3.5.2 Buck 1 Converter (V(IO)):
        3. 7.3.5.3 Buck 2 Converter (V(CORE)):
        4. 7.3.5.4 Buck 3 Converter (V(HAVDD)):
        5. 7.3.5.5 Positive Charge-Pump Controller (V(GH)):
        6. 7.3.5.6 Negative Charge-Pump Controller (V(GL)):
    4. 7.4 Device Functional Modes
      1. 7.4.1 Boost Converter (V(AVDD))
        1. 7.4.1.1 Soft-Start
        2. 7.4.1.2 Compensation
        3. 7.4.1.3 Setting the Output Voltage V(AVDD)
        4. 7.4.1.4 High Voltage Stress Mode (HVS)
        5. 7.4.1.5 Programmable Current Limit
        6. 7.4.1.6 Design Procedure
        7. 7.4.1.7 Inductor Selection
        8. 7.4.1.8 Rectifier Diode Selection
          1. 7.4.1.8.1 Diode Type
          2. 7.4.1.8.2 Forward Voltage
          3. 7.4.1.8.3 Reverse Voltage
          4. 7.4.1.8.4 Thermal Characteristics
        9. 7.4.1.9 Output Capacitor Selection
      2. 7.4.2 Buck 1 Converter (V(IO))
        1. 7.4.2.1 Soft-Start
        2. 7.4.2.2 Setting the Output Voltage V(IO)
        3. 7.4.2.3 Design Procedure
        4. 7.4.2.4 Inductor Selection
        5. 7.4.2.5 Rectifier Diode Selection
          1. 7.4.2.5.1 Diode Type
          2. 7.4.2.5.2 Forward Voltage
          3. 7.4.2.5.3 Reverse Voltage
          4. 7.4.2.5.4 Forward Current
          5. 7.4.2.5.5 Thermal Characteristics
        6. 7.4.2.6 Output Capacitor Selection
      3. 7.4.3 BUCK 2 CONVERTER (V(CORE))
        1. 7.4.3.1 Soft-Start
        2. 7.4.3.2 Setting the Output Voltage V(CORE)
        3. 7.4.3.3 Design Procedure
        4. 7.4.3.4 Inductor Selection
        5. 7.4.3.5 Output Capacitor Selection
      4. 7.4.4 Buck 3 Converter (V(HAVDD))
        1. 7.4.4.1 Soft-Start
        2. 7.4.4.2 Setting the Output Voltage V(HAVDD)
        3. 7.4.4.3 High Voltage Stress Mode (HVS)
        4. 7.4.4.4 Design Procedure
        5. 7.4.4.5 Inductor Selection
        6. 7.4.4.6 Output Capacitor Selection
      5. 7.4.5 Positive Charge Pump Controller (V(GH)) with Temperature Compensation
        1. 7.4.5.1 Soft-Start
        2. 7.4.5.2 Setting the Output Voltage V(GH)
        3. 7.4.5.3 Design Procedure
        4. 7.4.5.4 Output Capacitor Selection
      6. 7.4.6 Negative Charge Pump Controller (V(GL))
        1. 7.4.6.1 Soft-Start
        2. 7.4.6.2 Setting the Output Voltage V(GL)
        3. 7.4.6.3 Design Procedure
        4. 7.4.6.4 Output Capacitor Selection
    5. 7.5 Gate Pulse Modulation (V(GHM))
    6. 7.6 Programming
      1. 7.6.1  I2C Serial Interface Description
      2. 7.6.2  Memory Description
      3. 7.6.3  Read / Write Description
      4. 7.6.4  Write Operation
        1. 7.6.4.1 Write Single Byte to the DAC Register (DR):
        2. 7.6.4.2 Write Multiple Bytes to the DAC Register (DR):
        3. 7.6.4.3 Write All DAC Register (DR) Data to EEPROM (EE):
      5. 7.6.5  READ OPERATION
        1. 7.6.5.1 Read single data from DAC register (DR):
        2. 7.6.5.2 Read Multiple Data from DAC Register (DR):
        3. 7.6.5.3 Read Single Data to EEPROM (EE):
        4. 7.6.5.4 Read Multiple Data to EEPROM (EE):
      6. 7.6.6  Write Single Data to DAC:
      7. 7.6.7  Write Multiple Data to DAC (Auto Increment Address):
      8. 7.6.8  Write all DAC Data to EEPROM:
      9. 7.6.9  Read Single Data From DAC / EEPROM:
      10. 7.6.10 Read Multiple Data fFom DAC / EEPROM (Auto Increment Address):
    7. 7.7 Register Map
      1. 7.7.1 Registers and DAC Settings
        1. 7.7.1.1  Channel Register (with factory value) - 00h (00h)
        2. 7.7.1.2  Boost Output Voltage V(AVDD) Register (with factory value) - 01h (0Fh)
        3. 7.7.1.3  Boost HVS Offset Voltage Register (with factory value) - 02h (05h)
        4. 7.7.1.4  Boost Current Limit Negative Offset Current Register (with factory value) - 03h (00h)
        5. 7.7.1.5  Boost Soft-start Time Register (with factory value) - 04h (00h)
        6. 7.7.1.6  Buck 1 Output Voltage V(IO) Register (with factory value) - 05h (03h):
        7. 7.7.1.7  Buck 2 Output Voltage V(CORE) Register (with factory value) - 06h (02h)
        8. 7.7.1.8  Buck 3 Output Voltage V(HAVDD) Register (with factory value) - 07h (1Bh)
        9. 7.7.1.9  Pos. Charge Pump Low Output Voltage V(GH_L) Register (with factory value) - 08h (08h):
        10. 7.7.1.10 Positive Charge Pump Low Output Voltage V(GH_L) to V(GH_H) Positive Offset Voltage V(GH_OFS) Register (with factory value) - 09h (04h):
        11. 7.7.1.11 Gate Pulse Modulation Limit Voltage Register (with factory value) - 0Ah (00h)
        12. 7.7.1.12 Negative Charge Pump Output Voltage V(GL) Register (with factory value) - 0Bh (04h)
        13. 7.7.1.13 Buck 3 HVS Offset Voltage Register (with factory value) - 0Ch (00h):
        14. 7.7.1.14 Memory Write Remain Time Register (with factory value) - FEh (0Fh):
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 System Examples
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guideline
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Related Links
    2. 11.2 Third-Party Products Disclaimer
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11 Device and Documentation Support

11.1 Related Links

The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy.

Table 8. Related Links

PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY
TPS65177 Click here Click here Click here Click here Click here
TPS65177A Click here Click here Click here Click here Click here

11.2 Third-Party Products Disclaimer

TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.

11.3 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

    TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers.
    Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support.

11.4 Trademarks

E2E is a trademark of Texas Instruments.

All other trademarks are the property of their respective owners.

11.5 Electrostatic Discharge Caution

esds-image

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

11.6 Glossary

SLYZ022 — TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.