SLDS187A October 2018 – December 2019 TPS65216
This is the typical mode of operation when the system is up and running. All DCDC converters, LDOs, and load switch are operational and can be controlled through the I2C interface. After a wake-up event, the PMIC enables all rails controlled by the sequencer and pulls the nWAKEUP pin low to signal the event to the host processor. The device only enters ACTIVE state if the host asserts the PWR_EN pin within 20 s after the wake-up event. Otherwise it will enter OFF state. The nWAKEUP pin returns to HiZ mode after the PWR_EN pin is asserted. ACTIVE state can also be directly entered from SUSPEND state by pulling the PWR_EN pin high. See SUSPEND state description for details. To exit ACTIVE mode, the PWR_EN pin must be pulled low.