SLVSDJ1A July 2016 – May 2017 TPS65381A-Q1
Additional consideration: add a footprint for a RC snubber circuit if one is required for the application. The RC connects in-series between the SDN6 and PGND pins.
Connect the output capacitor as close as possible between the VDDx output and GND.
The power dissipation of the device in the application has significant impact on the necessary layout and thermal management strategy of the application.
Use the following equations to calculate the estimated power dissipation in the device:
The useful range of device operation is affected by the supply voltage, application load-current requirements, and the thermal characteristics of the package and printed circuit board (PCB). For the device to be useful over a wide temperature range, the package, PCB and thermal management strategy must allow for the effective removal of the produce heat to keep junction temperature of the device within rated limits.
Use Equation 1 to Equation 5 to calculate the estimated power dissipation. As shown by the equation for VDD6 power dissipation (PVDD6), Equation 2, a large portion of the power dissipation is determined by the efficiency of the VDD6 supply. The efficiency of the VDD6 supply depends on load current and supply voltage as shown in Equation 2.
The 32-pin HTSSOP PowerPAD (DAP) offers an effective means of removing heat from the device junction. As described in PowerPad™ Thermally Enhanced Package, the PowerPAD package offers a lead-frame die pad that is exposed at the base of the package. This thermal pad must be soldered to the copper on the PCB directly underneath the package to create an effective path for removal of heat from the device, and, therefore, to reduce the RθJC. The PCB must be designed with thermal lands and thermal vias to complete the heat removal subsystem, as summarized in PowerPAD™ Made Easy and A Guide to Board Layout for Best Thermal Resistance for Exposed Packages.
Considering the power dissipation of the device in the specific application is important, which is highly dependent on the supply voltage and load currents, the ambient and board temperatures, and any additional heat sink or cooling strategies necessary to maintain the junction temperature of the device below the maximum junction temperature of 150°C.
The VDD1 regulator may have significant power dissipation in the external FET depending on the VDD1 voltage and load current. The external FET power dissipation for the VDD1 regulator must be considered in system-level thermal analysis. If better efficiency or thermal performance is needed, a DC-DC regulator could be used instead of the linear regulator controller with external FET. The output voltage of the DC-DC regulator can still be monitored by the VDD1_SENSE pin similar to the VDD1 output voltage when the VDD1 linear regulator controller is used with an external FET.
The PowerPAD thermal pad is not directly connected to any leads of the package. However, it is electrically and thermally connected to the substrate, which is the ground (GND) and power ground (PGND) of the device.