SLVS338R May   2001  – April 2015 TPS715


  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Wide Supply Range
      2. 7.3.2 Low Supply Current
      3. 7.3.3 Stable With Any Capacitor ≥ 0.47 µF
      4. 7.3.4 Internal Current Limit
      5. 7.3.5 Reverse Current
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. Power the MSP430 Microcontroller
      2. 8.2.2 Detailed Design Procedure
        1. External Capacitor Requirements
        2. Dropout Voltage (VDO)
        3. Setting VOUT for the TPS71501 Adjustable LDO
      3. 8.2.3 Application Curves
    3. 8.3 Do's and Don'ts
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Power Dissipation
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. Evaluation Module
        2. Spice Models
      2. 11.1.2 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Application and Implementation


Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The TPS715 family of LDO regulators has been optimized for ultralow-power applications such as the MSP430 microcontroller. The ultralow-supply current of the TPS715 device maximizes efficiency at light loads, and its high input voltage range makes it suitable for supplies such as unconditioned solar panels.

8.2 Typical Application

TPS715 ai_apcir_fix-lvs338.gifFigure 12. Typical Application Circuit (Fixed-Voltage Version)
TPS715 ai_LDO_reg-lvs338.gifFigure 13. TPS71501 Adjustable LDO Regulator Programming

8.2.1 Design Requirements Power the MSP430 Microcontroller

Several versions of the TPS715 are ideal for powering the MSP430 microcontroller. Table 2 shows potential applications of some voltage versions.

Table 2. Typical MSP430 Applications

TPS71519 1.9 V VOUT(min) > 1.8 V required by many MSP430s. Allows lowest power consumption operation.
TPS71523 2.3 V VOUT(min) > 2.2 V required by some MSP430s flash operation.
TPS71530 3 V VOUT(min) > 2.7 V required by some MSP430s Flash operation.
TPS715345 3.45 V VOUT(max) < 3.6 V required by some MSP430s. Allows highest speed operation.

The TPS715 family offers many output voltage versions to allow designers to optimize the supply voltage for the MSP430, thereby minimizing the supply current consumed by the MSP430.

8.2.2 Detailed Design Procedure External Capacitor Requirements

Although not required, a 0.047-μF or larger input bypass capacitor, connected between IN and GND and located close to the device, is recommended to improve transient response and noise rejection of the power supply as a whole. A higher-value input capacitor may be necessary if large, fast-rise-time load transients are anticipated and the device is located several inches from the power source.

The TPS715 requires an output capacitor connected between OUT and GND to stabilize the internal control loop. Any capacitor (including ceramic and tantalum) greater than or equal to 0.47 μF properly stabilizes this loop. X7R or X5R type capacitors are recommended due to their wider temperature spec and lower temperature coefficient, but other types of capacitors may be used. Dropout Voltage (VDO)

Generally speaking, the dropout voltage often refers to the voltage difference between the input and output voltage (VDO = VIN – VOUT). However, in the Electrical Characteristics, VDO is defined as the VIN – VOUT voltage at the rated current, where the pass-FET is fully on in the ohmic region of operation and is characterized by the classic RDS(on) of the FET. VDO indirectly specifies a minimum input voltage above the nominal programmed output voltage at which the output voltage is expected to remain within its accuracy boundary. If the input falls below this VDO limit (VIN < VOUT + VDO), then the output voltage decreases in order to follow the input voltage.

Dropout voltage is always determined by the RDS(on) of the main pass-FET. Therefore, if the LDO operates below the rated current, then the VDO for that current scales accordingly. RDS(on) can be calculated using Equation 1:

Equation 1. TPS715 q_rdson_bvs204.gif Setting VOUT for the TPS71501 Adjustable LDO

The TPS715 family contains an adjustable-version, TPS71501, which sets the output voltage using an external resistor divider as shown in Figure 13. The output voltage operating range is 1.2 V to 15 V, and is calculated using:

Equation 2. TPS715 q_vo_vref_r1-lvs338.gif


  • VREF = 1.205 V (typical)

Resistors R1 and R2 should be chosen to allow approximately 1.5-μA of current through the resistor divider. Lower value resistors can be used for improved noise performance, but will consume more power. Higher resistor values should be avoided as leakage current into or out of FB across R1/R2 creates an offset voltage that is proportional to VOUT divided by VREF. The recommended design procedure is to choose R2 = 1 MΩ to set the divider current at 1.5 μA, and then calculate R1 using Equation 3:

Equation 3. TPS715 q_r1_vo_vref-lvs338.gif

Figure 13 shows this configuration.

8.2.3 Application Curves

TPS715 tc_vo_vi_t-lvs338.gif
Figure 14. Power Up and Power Down
TPS715 tc_vo_io_t-lvs338.gif
Figure 16. Load Transient Response
TPS715 tc_vi_t-lvs338.gif
Figure 15. Line Transient Response

8.3 Do's and Don'ts

Place at least one 0.47-µF capacitor as close as possible to the OUT and GND terminals of the regulator.

Do not connect the output capacitor to the regulator using a long, thin trace.

Connect an input capacitor as close as possible to the IN and GND terminals of the regulator for best performance.

Do not exceed the absolute maximum ratings.