SLVS338R May 2001 – April 2015 TPS715
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
The TPS715 family of LDO regulators has been optimized for ultralow-power applications such as the MSP430 microcontroller. The ultralow-supply current of the TPS715 device maximizes efficiency at light loads, and its high input voltage range makes it suitable for supplies such as unconditioned solar panels.
|TPS71519||1.9 V||VOUT(min) > 1.8 V required by many MSP430s. Allows lowest power consumption operation.|
|TPS71523||2.3 V||VOUT(min) > 2.2 V required by some MSP430s flash operation.|
|TPS71530||3 V||VOUT(min) > 2.7 V required by some MSP430s Flash operation.|
|TPS715345||3.45 V||VOUT(max) < 3.6 V required by some MSP430s. Allows highest speed operation.|
The TPS715 family offers many output voltage versions to allow designers to optimize the supply voltage for the MSP430, thereby minimizing the supply current consumed by the MSP430.
Although not required, a 0.047-μF or larger input bypass capacitor, connected between IN and GND and located close to the device, is recommended to improve transient response and noise rejection of the power supply as a whole. A higher-value input capacitor may be necessary if large, fast-rise-time load transients are anticipated and the device is located several inches from the power source.
The TPS715 requires an output capacitor connected between OUT and GND to stabilize the internal control loop. Any capacitor (including ceramic and tantalum) greater than or equal to 0.47 μF properly stabilizes this loop. X7R or X5R type capacitors are recommended due to their wider temperature spec and lower temperature coefficient, but other types of capacitors may be used.
Generally speaking, the dropout voltage often refers to the voltage difference between the input and output voltage (VDO = VIN – VOUT). However, in the Electrical Characteristics, VDO is defined as the VIN – VOUT voltage at the rated current, where the pass-FET is fully on in the ohmic region of operation and is characterized by the classic RDS(on) of the FET. VDO indirectly specifies a minimum input voltage above the nominal programmed output voltage at which the output voltage is expected to remain within its accuracy boundary. If the input falls below this VDO limit (VIN < VOUT + VDO), then the output voltage decreases in order to follow the input voltage.
Dropout voltage is always determined by the RDS(on) of the main pass-FET. Therefore, if the LDO operates below the rated current, then the VDO for that current scales accordingly. RDS(on) can be calculated using Equation 1:
The TPS715 family contains an adjustable-version, TPS71501, which sets the output voltage using an external resistor divider as shown in Figure 13. The output voltage operating range is 1.2 V to 15 V, and is calculated using:
Resistors R1 and R2 should be chosen to allow approximately 1.5-μA of current through the resistor divider. Lower value resistors can be used for improved noise performance, but will consume more power. Higher resistor values should be avoided as leakage current into or out of FB across R1/R2 creates an offset voltage that is proportional to VOUT divided by VREF. The recommended design procedure is to choose R2 = 1 MΩ to set the divider current at 1.5 μA, and then calculate R1 using Equation 3:
Figure 13 shows this configuration.
Place at least one 0.47-µF capacitor as close as possible to the OUT and GND terminals of the regulator.
Do not connect the output capacitor to the regulator using a long, thin trace.
Connect an input capacitor as close as possible to the IN and GND terminals of the regulator for best performance.
Do not exceed the absolute maximum ratings.