SBVS080J September   2006  – November 2016 TPS75100 , TPS75103 , TPS75105

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Load Regulation
      2. 7.3.2 Line Regulation
    4. 7.4 Device Functional Modes
      1. 7.4.1 LED ON
      2. 7.4.2 LED OFF
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Setting the Output Current Level
      2. 8.1.2 Limitations on LED Forward Voltages
      3. 8.1.3 Use of External Capacitors
      4. 8.1.4 Use of Unused Outputs or Tying Outputs Together
      5. 8.1.5 Use of Enable Pins for PWM Dimming
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
      2. 11.1.2 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Related Links
    4. 11.4 Receiving Notification of Documentation Updates
    5. 11.5 Community Resources
    6. 11.6 Trademarks
    7. 11.7 Electrostatic Discharge Caution
    8. 11.8 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DSK|10
  • YFF|9
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VIN range –0.3 7 V
VISET, VENA, VENB, VDX range –0.3 VIN V
IDX for D1A, D2A, D1B, D2B 35 mA
D1A, D2A, D1B, D2B short-circuit duration Indefinite
Continuous total power dissipation Internally limited
Junction temperature, TJ –55 150 °C
Storage temperature, Tstg –55 150 °C

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

PARAMETER MIN NOM MAX UNIT
VIN Input voltage 2.7 5.5 V
IDX Operating current per LED 3 25 mA
tPWM On-time for PWM signal 33 µs
TJ Operating junction temperature range –40 85 °C

6.4 Thermal Information

THERMAL METRIC(1) TPS7510x UNIT
YFF (DSBGA) DSK (WSON)
9 PINS 10 PINS
RθJA Junction-to-ambient thermal resistance 101.6 65.3 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 1.2 54.0 °C/W
RθJB Junction-to-board thermal resistance 17.6 39.5 °C/W
ψJT Junction-to-top characterization parameter 0.6 1.6 °C/W
ψJB Junction-to-board characterization parameter 17.8 39.7 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A 23.6 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Electrical Characteristics

over operating junction temperature range (TJ = –40°C to +85°C), VIN = 3.8 V, DxA and DxB = 3.3 V, RSET = 32.4 kΩ, and ENA and ENB = 3.8 V (unless otherwise noted); typical values are at TA = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ISHDN Shutdown supply current VENA,B = 0 V, VDX = 0 V 0.03 1 µA
IGND Ground current DSK package IDX ≤ 5 mA, VIN = 3.8 V 170 230 µA
IDX > 5 mA, VIN = 3.8 V 250 300
YFF package IDX ≤ 5 mA, VIN = 4.5 V 170 200
IDX > 5 mA, VIN = 4.5 V 250 300
ΔID Current matching
(IDXMAX – IDXMIN / IDXMAX) × 100%		 TA = 25°C 0% 2% 4%
TA = –40°C to +85°C YFF package 0% 5%
DSK package 0% 6%
ΔIDX%/ΔVIN Line regulation 3.5 V ≤ VIN ≤ 4.5 V, IDX = 5 mA 2.0 %/V
ΔIDX%/ΔVDX Load regulation 1.8 V ≤ VDX ≤ 3.5 V, IDX = 5 mA 0.8 %/V
VDO Dropout voltage of any
DX current source
(VDX at IDX = 0.8 × IDX, nom)		 IDXnom = 5 mA 28 100 mV
IDXnom = 15 mA 70
VISET Reference voltage for current set 1.183 1.225 1.257 V
IOPEN Diode current accuracy(1) ISET = open,
VDX = VIN – 0.2 V		 YFF package 0.5% 3%
DSK package 0.5% 4%
ISET ISET pin current range 2.5 62.5 µA
k ISET to IDX current ratio(1) 420
VIH Enable high level input voltage 1.2 V
VIL Enable low level input voltage 0.4 V
IINA Enable pin A (VENA) input current VENA = 3.8 V 5.0 6.1 µA
VENA = 1.8 V 2.2
IINB Enable pin B (VENB) input current VENB = 3.8 V 4.0 4.9 µA
VENB = 1.8 V 1.8
tSD Shutdown delay time Delay from ENA and ENB = low to reach shutdown current
(IDX = 0.1 × IDX, nom)		 5 13 30 µs
TSD Thermal shutdown temperature Shutdown, temperature increasing 165 °C
Reset, temperature decreasing 140
(1) Average of all four IDX outputs.

6.6 Typical Characteristics

over operating junction temperature range (TJ = –40°C to +85°C), VIN = 3.8 V, DxA and DxB = 3.3 V, RSET = 32.4 kΩ, and ENA and ENB = high (unless otherwise noted); typical values are at TA = 25°C
TPS75100 TPS75103 TPS75105 tc_led-duty_bvs080.gif
Figure 1. LED Current vs Duty Cycle (f = 300 Hz)
TPS75100 TPS75103 TPS75105 tc_line_trans_300_bvs080.gif
Figure 3. Line Transient (300-mV Pulse)
TPS75100 TPS75103 TPS75105 tc_dim_one_ch_bvs080.gif
Figure 5. Dimming Response (Single Channel)
TPS75100 TPS75103 TPS75105 tc_io-rset_xpand_bvs080.gif
Figure 7. Output Current vs RSET
TPS75100 TPS75103 TPS75105 tc_gnd-vin_bvs080.gif
Figure 9. Ground Current vs Input Voltage
TPS75100 TPS75103 TPS75105 tc_io-tmp_bvs080.gif
Figure 11. TPS75105 Output Current vs Temperature
RSET = Open
TPS75100 TPS75103 TPS75105 tc_line_trans_600_bvs080.gif
Figure 2. Line Transient (600-mV Pulse)
TPS75100 TPS75103 TPS75105 tc_dim_both_ch_bvs080.gif
Figure 4. Dimming Response (Both Channels)
TPS75100 TPS75103 TPS75105 tc_io-voltage_bvs080.gif
Figure 6. Output Current vs Headroom Voltage
TPS75100 TPS75103 TPS75105 tc_io-rset_bvs080.gif
Figure 8. Output Current vs RSET
TPS75100 TPS75103 TPS75105 tc_io-vin_bvs080.gif
Figure 10. TPS75105 Output Current vs Input Voltage
RSET = Open
TPS75100 TPS75103 TPS75105 tc_io-vo_bvs080.gif
Figure 12. Output Current vs Output Voltage