SLVS208J May 1999 – August 2015 TPS767
Refer to the PDF data sheet for device specific package drawings
This device is designed to have a fast transient response and be stable with 10 µF low ESR capacitors. This combination provides high performance at a reasonable cost.
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically
230 mV at an output current of 1 A for the TPS76750) and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically
85 µA over the full range of output current, 0 mA to
1 A). These two key specifications yield a significant improvement in operating life for battery-powered systems. This LDO family also features a sleep mode; applying a TTL high signal to EN (enable) shuts down the regulator, reducing the quiescent current to 1 µA at TJ = 25°C.
|PART NUMBER||PACKAGE||BODY SIZE (NOM)|
|TPS767xx||SOIC (8)||4.90 mm × 3.91 mm|
|HTSSOP (20)||6.50 mm x 4.40 mm|
Changes from I Revision (January 2004) to J Revision