SBVS254D February 2018 – August 2019 TPS7A05
The device contains a thermal shutdown protection circuit to disable the device when thermal junction temperature (TJ) of the main pass-FET rises to Tsd(Shutdown) (typical). Thermal shutdown hysteresis assures that the LDO resets again (turns on) when the temperature falls to Tsd(Reset) (typical).
The thermal time-constant of the semiconductor die is fairly short, and thus the device may cycle on and off when thermal shutdown is reached until power dissipation is reduced.
For reliable operation, limit the junction temperature to a maximum of 125°C. Operation above 125°C causes the device to exceed its operational specifications. Although the internal protection circuitry of the device is designed to protect against thermal overload conditions, this circuitry is not intended to replace proper heat sinking. Continuously running the device into thermal shutdown or above a junction temperature of 125°C reduces long-term reliability.
A fast start-up when TJ > Tsd(Reset) (typical, outside of the specified operating range) causes the device thermal shutdown to assert at Tsd(Reset) and prevents the device from turning on until the junction temperature is reduced below Tsd(Shutdown).