SLVS720F June   2008  – November 2015

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Adjustable Operation
      2. 8.3.2 Fixed Operation
      3. 8.3.3 Overload Recovery
      4. 8.3.4 Output Voltage Noise
      5. 8.3.5 Protection Features
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Output Capacitance and Transient Response
    2. 9.2 Typical Applications
      1. 9.2.1 Adjustable Output Operation
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Paralleling Regulators for Higher Output Current
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
      1. 11.3.1 Calculating Junction Temperature
  12. 12Device and Documentation Support
    1. 12.1 Related Links
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

DCQ Package
6-Pin SOT-223
Top View
TPS7A4501 TPS7A4515 TPS7A4518 TPS7A4525 TPS7A4533 po_DCQ_lvs720.gif
KTT Package
6-Pin TO-263
Top View
TPS7A4501 TPS7A4515 TPS7A4518 TPS7A4525 TPS7A4533 po_KTT_lvs720.gif

Pin Functions

PIN DESCRIPTION
NO. NAME
1 SHDN Shutdown. SHDN is used to put the TPS7A45xx regulators into a low-power shutdown state. The output is off when SHDN is pulled low. SHDN can be driven by 5-V logic, 3-V logic or open-collector logic with a pullup resistor. The pullup resistor is required to supply the pullup current of the open-collector gate, normally several microamperes, and SHDN current, typically 3 μA. If unused, SHDN must be connected to VIN. The device is in the low-power shutdown state if SHDN is not connected.
2 IN Input. Power is supplied to the device through IN. A bypass capacitor is required on this pin if the device is more than six inches away from the main input filter capacitor. In general, the output impedance of a battery rises with frequency, so it is advisable to include a bypass capacitor in battery-powered circuits. A bypass capacitor (ceramic) in the range of 1 μF to 10 μF is sufficient. The TPS7A45xx regulators are designed to withstand reverse voltages on IN with respect to ground and on OUT. In the case of a reverse input, which can happen if a battery is plugged in backwards, the device acts as if there is a diode in series with its input. There is no reverse current flow into the regulator, and no reverse voltage appears at the load. The device protects both itself and the load.
3 GND Ground.
For the KTT package, the exposed thermal pad is connected to GND and must be soldered to the PCB for rated thermal performance.
4 OUT Output. The output supplies power to the load. A minimum output capacitor (ceramic) of 10 μF is required to prevent oscillations. Larger output capacitors are required for applications with large transient loads to limit peak voltage transients.
5 ADJ Adjust. For the adjustable version only (TPS7A4501), this is the input to the error amplifier. ADJ is internally clamped to ±7 V. It has a bias current of 3 μA that flows into the pin. ADJ voltage is 1.21 V referenced to ground, and the output voltage range is 1.21 V to 20 V.
5 SENSE Sense. For fixed-voltage versions (TPS7A4515, TPS7A4518, TPS7A4525, and TPS7A4533), SENSE is the input to the error amplifier. Optimum regulation is obtained at the point where SENSE is connected to the OUT pin of the regulator. In critical applications, small voltage drops are caused by the resistance (RP) of PCB traces between the regulator and the load. These may be eliminated by connecting SENSE to the output at the load as shown in Figure 32. Note that the voltage drop across the external PCB traces adds to the dropout voltage of the regulator. SENSE bias current is 600 μA at the rated output voltage. SENSE can be pulled below ground (as in a dual supply system in which the regulator load is returned to a negative supply) and still allow the device to start and operate.
6 GND Ground. DCQ package only.