SLVSCK0A
April 2014 – June 2014
TPS7A8101-Q1
PRODUCTION DATA.
1
Features
2
Applications
3
Description
4
Typical Application Circuit
5
Revision History
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
Handling Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Internal Current-Limit
8.3.2
Shutdown
8.3.3
Startup
8.3.4
Undervoltage Lockout (UVLO)
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.1.1
Dropout Voltage
9.2.1.2
Minimum Load
9.2.1.3
Input And Output Capacitor Requirements
9.2.1.4
Transient Response
9.2.2
Detailed Design Procedure
9.2.2.1
Output Noise
9.2.3
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.1.1
Board Layout Recommendations To Improve PSRR And Noise Performance
11.2
Layout Example
11.3
Thermal Information
11.3.1
Thermal Protection
11.3.2
Package Mounting
11.3.3
Power Dissipation
11.3.4
Estimating Junction Temperature
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
Trademarks
12.3
Electrostatic Discharge Caution
12.4
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DRB|8
MPDS118K
Thermal pad, mechanical data (Package|Pins)
DRB|8
QFND058N
Orderable Information
slvsck0a_oa
slvsck0a_pm