SLVSCA0C
October 2013 – September 2016
TPS7B4250-Q1
PRODUCTION DATA.
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Regulated Output (VOUT)
7.3.2
Undervoltage Shutdown
7.3.3
Thermal Protection
7.3.4
VOUT Short to Battery
7.3.5
Tracking Regulator with ENABLE Circuit
7.4
Device Functional Modes
7.4.1
Operation With VI < 4 V
7.4.2
Operation With ADJ/EN Control
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
External Capacitors
8.2.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.1.1
Package Mounting
10.1.2
Board Layout Recommendations to Improve PSRR and Noise Performance
10.2
Layout Example
10.3
Power Dissipation and Thermal Considerations
11
Device and Documentation Support
11.1
Device Support
11.1.1
Development Support
11.2
Documentation Support
11.2.1
Related Documentation
11.3
Receiving Notification of Documentation Updates
11.4
Community Resource
11.5
Trademarks
11.6
Electrostatic Discharge Caution
11.7
Glossary
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DBV|5
MPDS018T
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slvsca0c_oa
slvsca0c_pm