SBVS392A june   2022  – august 2023 TPS7B4255-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Characteristics
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Tracker Output Voltage (VOUT)
        1. 7.3.1.1 Output Voltage Equal to the Reference Voltage
        2. 7.3.1.2 Output Voltage Less Than the Reference Voltage
      2. 7.3.2 Reverse Current Protection
      3. 7.3.3 Undervoltage Lockout
      4. 7.3.4 Thermal Protection
      5. 7.3.5 Current Limit
      6. 7.3.6 Output Short to Battery
      7. 7.3.7 Tracking Regulator With an Enable Circuit
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
      3. 7.4.3 Operation With VIN < 3 V
      4. 7.4.4 Disable With ADJ/EN Control
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Dropout Voltage
      2. 8.1.2 Reverse Current
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input and Output Capacitor Selection
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Package Mounting
        2. 8.4.1.2 Board Layout Recommendations to Improve PSRR and Noise Performance
        3. 8.4.1.3 Power Dissipation and Thermal Considerations
        4. 8.4.1.4 Thermal Performance Versus Copper Area
      2. 8.4.2 Layout Examples
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Device Nomenclature
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Mechanical Data

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.5 Current Limit

The device has an internal current limit circuit to protect the device during overcurrent or shorting conditions. The current limit circuit, as shown in Figure 7-4, is a brick-wall scheme. When the device is in current limit, the device sources ICL and the output voltage is not regulated. In this scenario, the output voltage depends on the load impedance.

GUID-14337015-8638-4C98-A3E1-0F7AD1633EA8-low.gif Figure 7-4 Current Limit: Brick-Wall Scheme

During a current limit event, the potential for high power dissipation exists because of the elevated current level and the increased input-to-output differential voltage (VIN – VOUT). If the device heats enough, the device can enter thermal shutdown. If the current-limit condition is not removed when the device turns back on after cooling, the device can enter thermal shutdown again and continue this cycle until the current limit condition is removed. The device survives this fault, but repeatedly operating in this mode degrades long-term reliability.