SBOS971 December   2023 TRF1305B2

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics - TRF1305B2
    6. 6.6 Typical Characteristics - TRF1305B2
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Fully Differential Amplifier
      2. 7.3.2 Output Common-Mode Control
      3. 7.3.3 Internal Resistor Configuration
    4. 7.4 Device Functional Modes
      1. 7.4.1 MODE Pin
        1. 7.4.1.1 Input Common-Mode Extension
      2. 7.4.2 Power-Down Mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Input and Output Interface Considerations
        1. 8.1.1.1 Single-Ended Input
        2. 8.1.1.2 Differential Input
        3. 8.1.1.3 DC Coupling Considerations
      2. 8.1.2 Gain Adjustment With External Resistors in a Differential Input Configuration
    2. 8.2 Typical Application
      1. 8.2.1 TRF1305x2 as ADC Driver in a Zero-IF Receiver
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Supply Voltages
      2. 8.3.2 Single-Supply Operation
      3. 8.3.3 Split-Supply Operation
      4. 8.3.4 Supply Decoupling
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Thermal Considerations
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RYP|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics - TRF1305B2

at TA = 25℃, VS+ = 5 V, VS– = 0 V, floating VOCM, PDx, and MODE pins, VICM = midsupply, D2D ac-coupled input/output with differential source impedance (ZS) = 100 Ω, differential output load (ZL) = 100 Ω, external input resistor network (see Figure 8-3), and resistor network included as part of DUT specifications (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
AC PERFORMANCE
SSBW Small-signal 3-dB bandwidth PIN = –20 dBm at each input 7.6 GHz
Small-signal 1-dB bandwidth 6.5
LSBW Large-signal 3-dB bandwidth Differential PIN = –3 dBm 7 GHz
Large-signal 1-dB bandwidth 6.5
S21 Power gain f = 4 GHz 9.8 dB
Gain variation over temperature f = 4 GHz, TA = –40℃ to +85℃ 0.7
S11 Input return loss f = 10 MHz to 7.5 GHz –10 dB
S12 Reverse isolation f < 10 GHz (when enabled) –20 dB
GIMB Differential gain imbalance f < 5 GHz, S2D, PIN = –20 dBm with 50-Ω source impedance ±0.2 dB
PHIMB Differential phase imbalance ±2 °
OP1dB Output 1-dB compression point f = 500 MHz 15.7 dBm
f = 1 GHz 16
f = 2 GHz 16
f = 3 GHz 15
f = 4 GHz 12.5
f = 5 GHz 11.3
HD2 Second-order harmonic distortion f = 500 MHz, VO = 2 VPP –73 dBc
f = 1 GHz, VO = 2 VPP –70
f = 2 GHz, VO = 2 VPP –60
f = 3 GHz, VO = 2 VPP –55
f = 4 GHz, VO = 2 VPP –46
HD3 Third-order harmonic distortion f = 500 MHz, VO = 2 VPP –68 dBc
f = 1 GHz, VO = 2 VPP –60
f = 2 GHz, VO = 2 VPP –55
f = 3 GHz, VO = 2 VPP –53
f = 4 GHz, VO = 2 VPP –47
OIP2 Output second-order intercept point f = 500 MHz, PO = 1 dBm per tone,
2-MHz spacing		 75 dBm
f = 1 GHz, PO = 1 dBm per tone,
2-MHz spacing		 72
f = 2 GHz, PO = 1 dBm per tone,
2-MHz spacing		 60
f = 3 GHz, PO = 1 dBm per tone,
2-MHz spacing		 53
f = 4 GHz, PO = 1 dBm per tone,
2-MHz spacing		 45
f = 5 GHz, PO = 1 dBm per tone,
2-MHz spacing		 49
OIP3 Output third-order intercept point f = 500 MHz, PO = 1 dBm per tone,
2-MHz spacing		 43.5 dBm
f = 1 GHz, PO = 1 dBm per tone,
2-MHz spacing		 39.2
f = 2 GHz, PO = 1 dBm per tone,
2-MHz spacing		 34
f = 3 GHz, PO = 1 dBm per tone,
2-MHz spacing		 30.5
f = 4 GHz, PO = 1 dBm per tone,
2-MHz spacing		 24
f = 5 GHz, PO = 1 dBm per tone,
2-MHz spacing		 21
NF Noise figure f = 500 MHz 8.4 dB
f = 1 GHz 8.8
f = 2 GHz 10.2
f = 4 GHz 12
f = 5 GHz 12.4
NSD Output noise spectral density f = 500 MHz –155.6 dBm/Hz
f = 1 GHz –155.2
f = 2 GHz –153.8
f = 4 GHz –152
f = 5 GHz –151.6
DC PERFORMANCE
VOD-MAX Max differential output voltage f = 1 GHz 4 VPP
Slew rate 2-V VO step, S2D configuration,
VS+ = 2.5 V, VS– = –2.5 V		 25 kV/µs
Output differential offset voltage ±3 mV
Overdrive recovery time From 2 × overdrive of each SE output to each output voltage settling to < ±50 mV 6 ns
COMMON-MODE
VICM Input common-mode voltage Default range(1) VS– + 1.5 VS– + 3.5 V
VOCM Output common-mode voltage VS– + 2 VS– + 3 V
Output common-mode offset voltage from VOCM voltage ±10 mV
IMPEDANCE
Zin-SE Single ended input impedance At INPx pin with appropriate termination on INMx pin 47 Ω
ZO-DIFF Differential output impedance f = near dc 8 Ω
CHANNEL-TO-CHANNEL PERFORMANCE
Channel-to-channel amplitude matching f < 2 GHz 0.05 dB
f < 5 GHz 0.3
Isolation f < 2 GHz –55 dB
f < 5 GHz –50
POWER SUPPLY
IQA Active quiescent current Both channels active 180 mA
One channel active, other is powered down 102
IQPD Power-down quiescent current Both channels powered down 25 mA
POWER DOWN
VPD_Hi PD pin logic high Referenced to PAD, see Section 6.1 1.35 V
VPD_Lo PD pin logic low Referenced to PAD, see Section 6.1 0.3 V
IPD_Bias PD bias current (current on PD pin) PD = high (1.8-V logic) 15 µA
PD = high (3.3-V logic) 30
tON Turn-on time From 50% VPD transition to 90% RF out 25 ns
tOFF Turn-off time From 50% VPD transition to 10% RF out 20 ns
(1) VICM range can be extended closer to VS+ or VS– in D2D configuration. See Section 7.4.1 for more details.