SCDS256A October   2009  – September 2016 TS3USB31E

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Dynamic Electrical Characteristics
    7. 6.7 Switching Characteristics
  7. 7 Application Information
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 IOFF Supports Partial Power-Down Mode Operation
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Community Resource
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9 Detailed Description

9.1 Overview

The TS3USB31E is a 1:1 SPST high-bandwidth switch specially designed for the switching of high-speed USB 2.0 signals. The switch is bidirectional and offers little or no attenuation of the high-speed signals. It is designed for low bit-to-bit skew and high channel-to-channel noise isolation, and is compatible with various standards, such as high-speed USB 2.0 (480 Mbps).

9.2 Functional Block Diagram

TS3USB31E analog_sym_cds242.gif

9.3 Feature Description

9.3.1 IOFF Supports Partial Power-Down Mode Operation

When VCC = 0 V, the signal path is placed in a high impedance state which isolates the bus. This allows signals to be present on the D± and HSD± pins before the device is powered up without damaging the device.

9.4 Device Functional Modes

The TS3USB31E device has two modes that are digitally controlled by the OE pin. Setting the OE pin High isolates the signal path by a high impedance state. See Table 1.

Table 1. Truth Table

OE FUNCTION
H Disconnect
L D+, D– = HSD+, HSD–