SCDS385B January   2018  – July 2018 TS5MP645

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Powered-Off Protection
      2. 8.3.2 1.8 V Logic Compatible Inputs
      3. 8.3.3 Low Power Disable Mode
    4. 8.4 Device Functional Modes
      1. 8.4.1 Pin Functions
      2. 8.4.2 Low Power Mode
      3. 8.4.3 Switch Enabled Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • YFP|36
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.2 1.8 V Logic Compatible Inputs

The TS5MP645 has 1.8 V logic compatible digital inputs for switch control. Regardless of the VDD voltage the digital input thresholds remained fixed, allowing a 1.8 V processor GPIO to control the TS5MP645 without the need for an external translator. This saves both space and BOM cost.

An example setup for a system without a 1.8 V logic compatible input is shown in Figure 22. Here the supply mismatch between the process and its GPIO output and the supply to the switch require a translator.

TS5MP645 scds371_1p8_1.gifFigure 22. System Without 1.8 V Logic Compatible Inputs

With the 1.8 V logic compatibility in the TS5MP645, the translator is built in to the device so that the external components are no longer needed, simplifying the system design and overall cost.

TS5MP645 scds371-1p8_2.gifFigure 23. System With 1.8 V Logic Compatible Inputs