SCES949 August   2022

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions—TXU0202-Q1
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Switching Characteristics, VCCA = 1.2 ± 0.1 V
    7. 6.7  Switching Characteristics, VCCA = 1.5 ± 0.1 V
    8. 6.8  Switching Characteristics, VCCA = 1.8 ± 0.15 V
    9. 6.9  Switching Characteristics, VCCA = 2.5 ± 0.2 V
    10. 6.10 Switching Characteristics, VCCA = 3.3 ± 0.3 V
    11. 6.11 Switching Characteristics, VCCA = 5.0 ± 0.5 V
    12. 6.12 Operating Characteristics
    13. 6.13 Typical Characteristics
  7. Parameter Measurement Information
    1. 7.1 Load Circuit and Voltage Waveforms
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 CMOS Schmitt-Trigger Inputs with Integrated Pulldowns
        1. 8.3.1.1 Inputs with Integrated Static Pull-Down Resistors
      2. 8.3.2 Control Logic (OE) with VCC(MIN) Circuitry
      3. 8.3.3 Balanced High-Drive CMOS Push-Pull Outputs
      4. 8.3.4 VCC Isolation and VCC Disconnect
      5. 8.3.5 Over-Voltage Tolerant Inputs
      6. 8.3.6 Glitch-Free Power Supply Sequencing
      7. 8.3.7 Negative Clamping Diodes
      8. 8.3.8 Fully Configurable Dual-Rail Design
      9. 8.3.9 Supports High-Speed Translation
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Regulatory Requirements
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Detailed Design Procedure

To begin the design process, determine the following:

  • Input voltage range
    • Use the supply voltage of the device that is driving the TXU0202-Q1 device to determine the input voltage range. For a valid logic-high, the value must exceed the positive-going input-threshold voltage (VT+) of the input port. For a valid logic low the value must be less than the negative-going input-threshold voltage (VT-) of the input port.
  • Output voltage range
    • Use the supply voltage of the device that the TXU0202-Q1 device is driving to determine the output voltage range.