SCES931C April   2021  – September 2025 TXU0204-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Related Products
  6. 5 Pin Configuration and Functions—TXU0204-Q1
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Switching Characteristics: Tsk, TMAX
    7. 6.7  Switching Characteristics, VCCA = 1.2 ± 0.1V
    8. 6.8  Switching Characteristics, VCCA = 1.5 ± 0.1V
    9. 6.9  Switching Characteristics, VCCA = 1.8 ± 0.15V
    10. 6.10 Switching Characteristics, VCCA = 2.5 ± 0.2V
    11. 6.11 Switching Characteristics, VCCA = 3.3 ± 0.3V
    12. 6.12 Switching Characteristics, VCCA = 5.0 ± 0.5V
    13. 6.13 Operating Characteristics
    14. 6.14 Typical Characteristics
  8. 7 Parameter Measurement Information
    1. 7.1 Load Circuit and Voltage Waveforms
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  CMOS Schmitt-Trigger Inputs with Integrated Pulldowns
        1. 8.3.1.1 Inputs with Integrated Static Pull-Down Resistors
      2. 8.3.2  Control Logic (OE) with VCC(MIN) Circuitry
      3. 8.3.3  Balanced High-Drive CMOS Push-Pull Outputs
      4. 8.3.4  Partial Power Down (Ioff)
      5. 8.3.5  VCC Isolation and VCC Disconnect
      6. 8.3.6  Over-Voltage Tolerant Inputs
      7. 8.3.7  Glitch-Free Power Supply Sequencing
      8. 8.3.8  Negative Clamping Diodes
      9. 8.3.9  Fully Configurable Dual-Rail Design
      10. 8.3.10 Supports High-Speed Translation
      11. 8.3.11 Wettable Flanks
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Regulatory Requirements
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.4 Partial Power Down (Ioff)

The inputs and outputs for this device enter a high-impedance state when the device is powered down, inhibiting current backflow into the device. The Ioff in the Section 6.5 specifies the maximum leakage into or out of any input or output pin on the device.