SLUSF13 august   2023 UCC15240-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Insulation Specifications
    6. 7.6 Electrical Characteristics
    7. 7.7 Safety Limiting Values
  9. 8 Safety-Related Certifications
  10. 9 Insulation Characteristics
  11. 10Typical Characteristics
  12. 11Detailed Description
    1. 11.1 Overview
    2. 11.2 Functional Block Diagram
    3. 11.3 Feature Description
      1. 11.3.1 Power Stage Operation
        1. 11.3.1.1 VDD-VEE Voltage Regulation
        2. 11.3.1.2 COM-VEE Voltage Regulation
        3. 11.3.1.3 Power Handling Capability
      2. 11.3.2 Output Voltage Soft Start
      3. 11.3.3 ENA and PG
      4. 11.3.4 Protection Functions
        1. 11.3.4.1 Input Undervoltage Lockout
        2. 11.3.4.2 Input Overvoltage Lockout
        3. 11.3.4.3 Output Undervoltage Protection
        4. 11.3.4.4 Output Overvoltage Protection
        5. 11.3.4.5 Overpower Protection
        6. 11.3.4.6 Overtemperature Protection
    4. 11.4 Device Functional Modes
  13. 12Application and Implementation
    1. 12.1 Application Information
    2. 12.2 Typical Application
      1. 12.2.1 Design Requirements
      2. 12.2.2 Detailed Design Procedure
        1. 12.2.2.1 Capacitor Selection
        2. 12.2.2.2 Single RLIM Resistor Selection
        3. 12.2.2.3 RDR Circuit Component Selection
        4. 12.2.2.4 Feedback Resistors Selection
    3. 12.3 Application Curves
    4. 12.4 System Examples
    5. 12.5 Power Supply Recommendations
    6. 12.6 Layout
      1. 12.6.1 Layout Guidelines
      2. 12.6.2 Layout Example
  14. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Support Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  15. 14Mechanical, Packaging, and Orderable Information
  16. 15Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11.3.4.4 Output Overvoltage Protection

The UCC15240-Q1 devices sense the output voltage through FBVDD and FBVEE pins to control the output voltage. To prevent the output voltage becomes too high, damages the load or UCC15240-Q1 device itself, the UCC15240-Q1 devices are equipped with the output overvoltage protection. There are two levels of overvoltage protection, based on the feedback pin voltage, and the output voltage.

During the normal operation, because of load transient, or load unbalancing between two outputs, the output voltages can exceed its regulation level. Based on the pin voltages on FBVDD and FBVEE, after the voltage exceeds the threshold, VVDD_OVP_RISE, or VVEE_OVP_RISE (10% above the target regulation voltage), the converter stops switching immediately.

In rare cases, the voltage divider becomes malfunction and gives the wrong output voltage information. In turn, the control loop can regulate the output voltages at a wrong voltage level. The UCC15240-Q1 device is also equipped with a fail-safe overvoltage protection. After the VDD-VEE voltage becomes higher than the overvoltage protection threshold VVDD_OVLOS_RISE, the converter shuts down immediately. This fail-safe protection level is set at 31 V. It is meant to protect UCC15240-Q1 devices, instead of the load. The design must ensure the voltage feedback divider normal operation at all conditions.

The output overvoltage protections have the latch-off response.