SLUSA13E February   2010  – November 2023 UCC27321-Q1 , UCC27322-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Description (continued)
  6. Related Products
  7. Pin Configuration and Functions
  8. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Stage
      2. 8.3.2 Output Stage
      3. 8.3.3 Source and Sink Capabilities During Miller Plateau
      4. 8.3.4 VDD
      5. 8.3.5 Drive Current and Power Requirements
      6. 8.3.6 Enable
    4. 8.4 Device Functional Modes
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Input-to-Output Configuration
        2. 9.2.2.2 Input Threshold Type
        3. 9.2.2.3 VDD Bias Supply Voltage
        4. 9.2.2.4 Peak Source and Sink Currents
        5. 9.2.2.5 Enable and Disable Function
        6. 9.2.2.6 Propagation Delay
      3. 9.2.3 Application Curves
  11. 10Power Supply Recommendations
    1.     40
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
    4. 11.4 Power Dissipation
  13. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  14. 13Revision History
  15. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Thermal Considerations

The useful range of a driver is greatly affected by the drive-power requirements of the load and the thermal characteristics of the package. For a power driver to be useful over a particular temperature range, the package must allow for the efficient removal of the heat produced while keeping the junction temperature within rated limits. The UCC2732x-Q1 family of drivers is available in two different packages to cover a range of application requirements.

The 8-pin SOIC (D) package has a power rating of approximately 0.5 W at TA = 70°C. This limit is imposed in conjunction with the power derating factor also given in the table. The power dissipation in our earlier example is 0.432 W with a 10-nF load, 12-V VDD, switched at 300 kHz. Thus, only one load of this size could be driven using the D package. The difficulties with heat removal limit the drive available in the older packages.

The 8-pin MSOP PowerPAD (DGN) significantly relieves this concern by offering an effective means of removing the heat from the semiconductor junction. As illustrated in PowerPad Thermally Enhanced Package, the PowerPAD packages offer a lead-frame die pad that is exposed at the base of the package. This pad is soldered to the copper on the PCB directly underneath the package, reducing the θJC to 4.7°C/W. Data is presented in PowerPad Thermally Enhanced Package to show that the power dissipation can be quadrupled in the PowerPAD package when compared to the standard packages. The PCB must be designed with thermal lands and thermal vias to complete the heat removal subsystem, as summarized in PowerPAD Made Easy. This allows a significant improvement in heatsink capability over that available in the D package and is shown to more than double the power capability of the D package.

Note:

The PowerPAD thermal pad is not directly connected to any leads of the package. However, it is electrically and thermally connected to the substrate, which is the ground of the device.