SLUS492J June   2001  – September 2018 UCC27323 , UCC27324 , UCC27325 , UCC37323 , UCC37324 , UCC37325

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified Application Diagram
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Stage
      2. 8.3.2 Output Stage
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Source/Sink Capabilities During Miller Plateau
        2. 9.2.2.2 Parallel Outputs
        3. 9.2.2.3 VDD
        4. 9.2.2.4 Driver Current and Power Requirements
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resource
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Electrical Characteristics

VDD = 4.5 to 15 V, TA = TJ (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT (INA, INB)
VIN_H Logic 1 input threshold 2 V
VIN_L Logic 0 input threshold 1
Input current 0 V ← VIN ← VDD –10 10 µA
OUTPUT (OUTA, OUTB)
Output current VDD = 14 V(1) 4 A
VOH High-level output voltage VOH = VDD – VOUT, IOUT = –10 mA 300 450 mV
VOL Low-level output level IOUT = 10 mA 22 45
Output resistance high TA = 25°C, IOUT = –10 mA, VDD = 14 V(2) 25 30 35 Ω
TA = full range, IOUT = –10 mA, VDD = 14 V(2) 18 42
Output resistance low TA = 25°C, IOUT = 10 mA, VDD = 14 V(2) 1.9 2.2 2.5
TA = full range, IOUT = 10 mA, VDD = 14 V(2) 1.2 4
Latch-up protection 500 mA
OVERALL
IDD Static Operating Current UCCx7323 INA = 0 V, INB = 0 V 300 450 µA
INA = 0 V, INB = HIGH 300 450
INA = HIGH, INB = 0 V 300 450
INA = HIGH, INB = HIGH 300 450
UCCx7324 INA = 0 V, INB = 0 V 2 50
INA = 0 V, INB = HIGH 300 450
INA = HIGH, INB = 0 V 300 450
INA = HIGH, INB = HIGH 600 750
UCCx7325 INA = 0 V, INB = 0 V 150 300
INA = 0 V, INB = HIGH 450 600
INA = HIGH, INB = 0 V 150 300
INA = HIGH, INB = HIGH 450 600
The pullup and pulldown circuits of the driver are bipolar and MOSFET transistors in parallel. The pulsed output current rating is the combined current from the bipolar and MOSFET transistors.
The pullup and pulldown circuits of the driver are bipolar and MOSFET transistors in parallel. The output resistance is the RDS(ON) of the MOSFET transistor when the voltage on the driver output is less than the saturation voltage of the bipolar transistor.