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Product details

Parameters

Number of channels (#) 2 Power switch MOSFET Peak output current (A) 4 Input VCC (Min) (V) 4.5 Input VCC (Max) (V) 15 Features Dual Inverting Outputs, Hysteretic Logic Operating temperature range (C) -40 to 125 Rise time (ns) 20 Fall time (ns) 15 Prop delay (ns) 25 Input threshold CMOS, TTL Channel input logic Inverting Input negative voltage (V) 0 Rating Catalog open-in-new Find other Low-side drivers

Package | Pins | Size

HVSSOP (DGN) 8 9 mm² 3 x 3 PDIP (P) 8 93 mm² 9.81 x 9.43 SOIC (D) 8 19 mm² 3.91 x 4.9 open-in-new Find other Low-side drivers

Features

  • Bi-CMOS Output Architecture
  • ±4 A Drive Current at the Miller Plateau Region
  • Constant-Current Even at Low Supply Voltages
  • Outputs Paralleled for Higher Drive Current
  • Available in MSOP-PowerPAD™ Package
  • TTL/CMOS Inputs Independent of Supply Voltage
  • Industry-Standard Pin-Out

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Description

The UCC2732x and UCC3732x family of high-speed dual-MOSFET Drivers deliver 4-A source and 4-A sink peak current to effectively drive MOSFETs where it is needed most at the Miller Plateau Region. A unique BiPolar and MOSFET hybrid output stage in parallel also allows efficient current sourcing and sinking at low supply voltages. Three standard logic options are offered — dual-inverting, dual-noninverting, and one-inverting and one-noninverting driver. Input thresholds are based on TTL and CMOS and independent of supply voltage and feature wide input hysteresis offering excellent noise immunity. The UCC2732x and UCC3732x family is available in the standard SOIC-8 (D) or PDIP-8 (P) packages as well as the thermally enhanced -8pin PowerPAD MSOP package (DGN), drastically lowering thermal resistance to improve long term reliability.

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UCC27523 ACTIVE 5-A/5-A dual-channel gate driver with 5-V UVLO, inverting inputs, and enable This product has higher drive current with 5-A sink/source, as well as faster propagation delay (13-ns) , rise time (7-ns) and fall time (6-ns).

Technical documentation

= Top documentation for this product selected by TI
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Type Title Date
* Datasheet UCCx732x Dual 4-A Peak High-Speed Low-Side Power-MOSFET Drivers datasheet (Rev. J) Sep. 26, 2018
Application note External Gate Resistor Selection Guide (Rev. A) Feb. 28, 2020
Application note Understanding Peak IOH and IOL Currents (Rev. A) Feb. 28, 2020
More literature Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) Oct. 29, 2018
Technical articles How to achieve higher system robustness in DC drives, part 3: minimum input pulse Sep. 19, 2018
Selection guide Power Management Guide 2018 (Rev. R) Jun. 25, 2018
Technical articles How to achieve higher system robustness in DC drives, part 2: interlock and deadtime May 30, 2018
Technical articles Boosting efficiency for your solar inverter designs May 24, 2018
Technical articles How to achieve higher system robustness in DC drives, part 1: negative voltage Apr. 17, 2018

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
49
Description
The UCC2742xQ1 EVM is a high-speed dual MOSFET evaluation module that provides a test platform for a quick and easy startup of the UCC2742xQ1 driver. Powered by a single 4V to 15V external supply, and featuring a comprehensive set of test points and jumpers. All of the devices have separate input (...)
Features
  • Three different UCC2742x-Q1 devices
  • Independent signal inputs
  • Common enable pin
  • Output FET support
EVALUATION BOARD Download
UCC3895 Evaluation Module
UCC3895EVM-001
149
Description

The UCC3895EVM-001 is an isolated 48V input phase shifted full bridge converter providing an output of 3.3V at 15A. Using the AB outputs of the UCC3895, a novel technique for direct control driven synchronous rectification is demonstrated.

Features

Uses the A and B outputs of the UCC3895 along with a UCC37324 dual 4A MOSFET driver to implement direct control of a synchronous rectifier current doubler in a phase shifted full bridge topology. This technique provides the proper gating and timing signals necessary to accurately synchronize output (...)

Design tools & simulation

SIMULATION MODEL Download
SLUM060.ZIP (38 KB) - PSpice Model
SIMULATION MODEL Download
SLUM109.ZIP (7 KB) - TINA-TI Spice Model
SIMULATION MODEL Download
SLUM110.TSC (117 KB) - TINA-TI Reference Design
SIMULATION MODEL Download
SLUM517.ZIP (1 KB) - PSpice Model
SIMULATION TOOL Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)

CAD/CAE symbols

Package Pins Download
HVSSOP (DGN) 8 View options
PDIP (P) 8 View options
SOIC (D) 8 View options

Ordering & quality

Information included:
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  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

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