SLUSAQ3G November   2011  – April 2015 UCC27523 , UCC27524 , UCC27525 , UCC27526

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 VDD and Undervoltage Lockout
      2. 8.3.2 Operating Supply Current
      3. 8.3.3 Input Stage
      4. 8.3.4 Enable Function
      5. 8.3.5 Output Stage
      6. 8.3.6 Low Propagation Delays and Tightly Matched Outputs
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Input-to-Output Logic
        2. 9.2.2.2 Enable and Disable Function
        3. 9.2.2.3 VDD Bias Supply Voltage
        4. 9.2.2.4 Propagation Delay
        5. 9.2.2.5 Drive Current and Power Dissipation
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12Device and Documentation Support
    1. 12.1 Related Links
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

D, DGN, or P Package UCC2752(3,4,5)
8-Pin SOT-23, HVSSOP, or PDIP
Top View
UCC27523 UCC27524 UCC27525 UCC27526 pin1_lusaq3.gif
DSD Package UCC2752(3,4,5)
8-Pin WSON
Top View
UCC27523 UCC27524 UCC27525 UCC27526 pin2_lusaq3.gif
DSD Package UCC27526
8-Pin WSON
Top View
UCC27523 UCC27524 UCC27525 UCC27526 pin3_lusaq3.gif

Pin Functions (UCC27523 / UCC27524 / UCC27525)

PIN I/O DESCRIPTION
NO. NAME
1 ENA I Enable input for Channel A: ENA biased LOW Disables Channel A output regardless of INA state, ENA biased HIGH or floating Enables Channel A output, ENA allowed to float hence the pin-to-pin compatibility with UCC2732X N/C pin.
2 INA I Input to Channel A: Inverting Input in UCC27523, Non-Inverting Input in UCC27524, Inverting Input in UCC27525, OUTA held LOW if INA is unbiased or floating.
3 GND - Ground: All signals referenced to this pin.
4 INB I Input to Channel B: Inverting Input in UCC27523, Non-Inverting Input in UCC27524, Non-Inverting Input in UCC27525, OUTB held LOW if INB is unbiased or floating.
5 OUTB O Output of Channel B
6 VDD I Bias supply input
7 OUTA O Output of Channel A
8 ENB I Enable input for Channel B: ENB biased LOW Disables Channel B output regardless of INB state, ENB biased HIGH or floating Enables Channel B output, ENB allowed to float hence the pin-to-pin compatibility with UCC2732X N/C pin.

Pin Functions (UCC27526)

PIN I/O DESCRIPTION
NO. NAME
1 INA– I Inverting Input to Channel A: When Channel A is used in Non-Inverting configuration, connect INA– to GND in order to Enable Channel A output, OUTA held LOW if INA– is unbiased or floating.
2 INB– I Inverting Input to Channel B: When Channel B is used in Non-Inverting configuration, connect INB– to GND in order to Enable Channel B output, OUTB held LOW if INB– is unbiased or floating.
3 GND - Ground: All signals referenced to this pin.
4 OUTB I Output of Channel B
5 VDD O Bias Supply Input
6 OUTA I Output of Channel A
7 INB+ O Non-Inverting Input to Channel B: When Channel B is used in Inverting configuration, connect INB+ to VDD in order to Enable Channel B output, OUTB held LOW if INB+ is unbiased or floating.
8 INA+ I Non-Inverting Input to Channel A: When Channel A is used in Inverting configuration, connect INA+ to VDD in order to Enable Channel A output, OUTA held LOW if INA+ is unbiased or floating.