SLUSBA7G December   2012  – June 2019

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Driving IGBT Without Negative Bias
  4. 4 Revision History
    1.     Description (continued)
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Timing Diagrams
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 VDD Undervoltage Lockout
      2. 8.3.2 Input Stage
      3. 8.3.3 Enable Function
      4. 8.3.4 Output Stage
    4. 8.4 Device Functional Modes
  9. 9 Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Driving IGBT Without Negative Bias
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Input-to-Output Configuration
          2. 9.2.1.2.2 Input Threshold Type
          3. 9.2.1.2.3 VDD Bias Supply Voltage
          4. 9.2.1.2.4 Peak Source and Sink Currents
          5. 9.2.1.2.5 Enable and Disable Function
          6. 9.2.1.2.6 Propagation Delay
          7. 9.2.1.2.7 Power Dissipation
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Driving IGBT With 13-V Negative Turn-Off BIAS
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curve
      3. 9.2.3 Single-Output Driver
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
        3. 9.2.3.3 Application Curve
      4. 9.2.4 Using UCC2753x Drivers in an Inverter
        1. 9.2.4.1 Design Requirements
        2. 9.2.4.2 Detailed Design Procedure
        3. 9.2.4.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Consideration
  12. 12Device and Documentation Support
    1. 12.1 Related Links
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Low-cost gate driver (offering optimal solution for driving FET and IGBTs)
  • Superior replacement to discrete transistor pair drive (providing easy interface with controller)
  • TTL and CMOS compatible input logic threshold (independent of supply voltage)
  • Split output options allow for tuning of turnon and turnoff currents
  • Inverting and noninverting input configurations
  • Enable with fixed TTL compatible threshold
  • High 2.5-A source and 2.5-A or 5-A sink peak drive currents at 18-V VDD
  • Wide VDD range from 10 V to 35 V
  • Input and enable pins capable of with standing up to –5-V DC below ground
  • Output held low when inputs are floating or during VDD UVLO
  • Fast propagation delays (17-ns Typical)
  • Fast rise and fall times
    (15-ns and 7-ns typical with 1800-pF Load)
  • Undervoltage lockout (UVLO)
  • Used as a high-side or low-side driver (if designed with proper bias and signal isolation)
  • Low-cost, space-saving 5-pin or 6-pin DBV (SOT-23) package options
  • UCC27536 and UCC27537 pin-to-pin compatible to TPS2828 and TPS2829
  • Operating temperature range of –40°C to 140°C