SLUSF94A December   2023  – March 2024 UCC57108-Q1

ADVMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Thermal Information
    4. 5.4 Recommended Operating Conditions
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Input Stage
      2. 6.3.2 Enable Function
      3. 6.3.3 Driver Stage
      4. 6.3.4 Desaturation (DESAT) Protection
      5. 6.3.5 Fault (FLT)
    4. 6.4 Device Functional Modes
  8. 7  Applications and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 VDD Undervoltage Lockout
      3. 7.2.3 Application Curves
  9. 8 Power Supply Recommendations
  10. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Third-Party Products Disclaimer
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.3.2 Enable Function

The Enable (EN) pin of the UCC5710xW-Q1 device also has TTL compatible input thresholds with wide hysteresis. The typical turnon threshold is 2.2V and the typical turn-off threshold is 1.2V with typical hysteresis of 1V. The Enable (EN) pin of the UCC5710xW-Q1 has an internal pullup resistor to an internal reference voltage. Thus, leaving the Enable pin floating turns on the driver and allows it to send output signals properly. If desired, the Enable can also be driven by low-voltage logic to enable and disable the driver. There is minimum delay from the enable block to the output for fast system response time. Similar to the input pins, the enable pin can also handle significant negative voltage and therefore provides system robustness. The enable pin can withstand wide range of slew rate such as 1V/ns to 1V/ms. The enable signal is independent of VDD voltage and stable across the full operating temperature range.