SLUS651E March   2005  – November 2021 UCD7100

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 Handling Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Input
      2. 9.3.2 Current Sensing and Protection
      3. 9.3.3 Handshaking
      4. 9.3.4 Driver Output
      5. 9.3.5 Source/Sink Capabilities During Miller Plateau
      6. 9.3.6 Drive Current and Power Requirements
    4. 9.4 Device Functional Modes
      1. 9.4.1 Operation with VDD < 4.25 V (minimum VDD)
      2. 9.4.2 Operation with IN Pin Open
      3. 9.4.3 Operation with ILIM Pin Open
      4. 9.4.4 Operation with ILIM Pin High
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curve
  11. 11Power Supply Recommendations
    1. 11.1 Supply
    2. 11.2 Reference and External Bias Supply
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
    3. 12.3 Thermal Considerations
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Development Support
    2. 13.2 Third-Party Products Disclaimer
    3. 13.3 Documentation Support
      1. 13.3.1 Related Documentation
    4. 13.4 Receiving Notification of Documentation Updates
    5. 13.5 Support Resources
    6. 13.6 Trademarks
    7. 13.7 Glossary
    8. 13.8 Electrostatic Discharge Caution
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10.2.2 Detailed Design Procedure

The cycle-by-cycle current protection is implemented by connecting the current sense signal to the CS pin. When the CS level is greater than the ILIM voltage minus 25 mV, the output of the driver is forced low and the current limit flag (CLF) is set high. The CLF signal is latched high until the UCD7K device receives the next rising edge on the IN pin.

Equation 6. GUID-A341EDBE-CA10-4F7E-B20C-F81ACC7B8C4F-low.png
Equation 7. GUID-E236B1A9-E9DB-463F-80A4-2B5B0BC489BA-low.png

The current limit threshold can be set to any value between 0.25 V and 1.0 V, so Rsense must be between 0.045 Ω and 0.195 Ω. For example, if Rsense is 0.15 Ω, then VILIM must be 0.775 V to protect input current at 5 A. If the digital controller has an internal digital-to-analog converter, then it can generate 0.775 V and connect to ILIM directly. For a digital controller without an internal digital-to-analog converter, it can generate a PWM signal, send the PWM signal through a low pass filter, then connect to the ILIM pin. Assuming the magnitude of the PWM pulse is 3.3 V, then the duty cycle is:

Equation 8. GUID-1D551725-FC6C-42BD-86DF-40E6E90B9D2D-low.png