SBASAW5
December 2025
ADS122C14
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
I2C Timing Requirements
5.7
I2C Switching Characteristics
5.8
Timing Diagrams
5.9
Typical Characteristics
6
Parameter Measurement Information
6.1
Noise Performance
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Analog Inputs and Multiplexer
7.3.2
Programmable Gain Amplifier (PGA)
7.3.3
Voltage Reference
7.3.3.1
Internal Reference
7.3.3.2
External Reference
7.3.3.3
Reference Buffers
7.3.4
Clock Source
7.3.5
Delta-Sigma Modulator
7.3.6
Digital Filter
7.3.6.1
Sinc4 and Sinc4 + Sinc1 Filter
7.3.6.2
FIR Filter
7.3.6.3
Digital Filter Latency
7.3.6.4
Global-Chop Mode
7.3.7
Excitation Current Sources (IDACs)
7.3.8
Burn-Out Current Sources (BOCS)
7.3.9
General Purpose IOs (GPIOs)
7.3.9.1
FAULT Output
7.3.9.2
DRDY Output
7.3.10
System Monitors
7.3.10.1
Internal Short (Offset Calibration)
7.3.10.2
Internal Temperature Sensor
7.3.10.3
External Reference Voltage Readback
7.3.10.4
Power-Supply Readback
7.3.11
Monitors and Status Flags
7.3.11.1
Reset (RESETn flag)
7.3.11.2
AVDD Undervoltage Monitor (AVDD_UVn flag)
7.3.11.3
Reference Undervoltage Monitor (REV_UVn flag)
7.3.11.4
Register Map CRC Fault (REG_MAP_CRC_FAULTn flag)
7.3.11.5
Internal Memory Fault (MEM_FAULTn flag)
7.3.11.6
Register Write Fault (REG_WRITE_FAULTn flag)
7.3.11.7
DRDY Indicator (DRDY bit)
7.3.11.8
Conversion Counter (CONV_COUNT[3:0])
7.4
Device Functional Modes
7.4.1
Power-up and Reset
7.4.1.1
Power-On Reset (POR)
7.4.1.2
Reset by Register Write
7.4.1.3
I2C General Call Reset
7.4.2
Operating Modes
7.4.2.1
Idle and Standby Mode
7.4.2.2
Power-Down Mode
7.4.2.3
Power-Scalable Conversion Modes
7.4.2.3.1
Continuous-Conversion Mode
7.4.2.3.2
Single-shot Conversion Mode
7.5
Programming
7.5.1
I2C Interface
7.5.2
I2C Address
7.5.3
Serial Clock (SCL) and Serial Data (SDA)
7.5.4
I2C Bus Speed
7.5.5
I2C Data Transfer Protocol
7.5.6
I2C General Call (Software Reset)
7.5.7
I3C Compatibility
7.5.8
Commands
7.5.8.1
RDATA (0000 0000b)
7.5.8.2
RREG (0100 rrrrb)
7.5.8.3
WREG (1000 rrrrb)
7.5.9
STATUS Header
7.5.10
I2C CRC
7.5.11
Register Map CRC
7.5.12
Data Ready (DRDY) Pin
7.5.13
Monitoring for New Conversion Data
7.5.13.1
DRDY Pin Monitoring
7.5.13.2
Reading DRDY Bit and Conversion Counter
7.5.13.3
Clock Counting
7.5.14
Conversion Data Format
8
Registers
9
Application and Implementation
9.1
Application Information
9.1.1
Serial Interface Connections
9.1.2
Connecting Multiple Devices on the Same I2C Bus
9.1.3
Unused Inputs and Outputs
9.1.4
Device Initialization
9.2
Typical Applications
9.2.1
Software-Configurable RTD Measurement Input
9.2.1.1
Design Requirements
9.2.1.2
Detailed Design Procedure
9.2.1.3
Application Performance Plots
9.2.1.4
Design Variant – 3-Wire RTD Measurement With Automatic Lead-Wire Compensation Using Two IDACs
9.2.2
Thermocouple Measurement With Cold-Junction Compensation Using a 2-wire RTD
9.2.3
Resistive Bridge Sensor Measurement With Temperature Compensation
9.3
Power Supply Recommendations
9.3.1
Power Supplies
9.3.2
Power-Supply Sequencing
9.3.3
Power-Supply Decoupling
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Example
10
Device and Documentation Support
10.1
Documentation Support
10.1.1
Related Documentation
10.2
Receiving Notification of Documentation Updates
10.3
Support Resources
10.4
Trademarks
10.5
Electrostatic Discharge Caution
10.6
Glossary
11
Revision History
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RTE|16
MPQF149D
Thermal pad, mechanical data (Package|Pins)
RTE|16
QFND525B
Orderable Information
sbasaw5_oa
sbasaw5_pm
Data Sheet
ADS1x2C14
Low-power, 16- and 24-Bit,
8
-Channel, 64kSPS, Delta-Sigma ADC With PGA, Voltage Reference, and I
2
C Interface