JAJS454C January   2010  – September 2017 ADS7924

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
  4. 改訂履歴
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Timing Requirements
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Multiplexer
      2. 7.3.2 ADC Input
      3. 7.3.3 Reference
      4. 7.3.4 Clock
      5. 7.3.5 Data Format
      6. 7.3.6 ADC Conversion Timing
        1. 7.3.6.1 Power-Up Time
        2. 7.3.6.2 Acquisition Time
        3. 7.3.6.3 Conversion Time
        4. 7.3.6.4 Sleep Time
      7. 7.3.7 Interrupt Output (INT)
      8. 7.3.8 PWRCON
      9. 7.3.9 Alarm
    4. 7.4 Device Functional Modes
      1. 7.4.1 ADC Operating Modes
        1. 7.4.1.1 Idle Mode
        2. 7.4.1.2 Awake Mode
        3. 7.4.1.3 Manual-Single Mode
        4. 7.4.1.4 Manual-Scan Mode
        5. 7.4.1.5 Auto-Single Mode
        6. 7.4.1.6 Auto-Scan Mode
        7. 7.4.1.7 Auto-Single With Sleep Mode
        8. 7.4.1.8 Auto-Scan With Sleep Mode
        9. 7.4.1.9 Auto-Burst Scan With Sleep Mode
    5. 7.5 Programming
      1. 7.5.1 I2C Interface
      2. 7.5.2 I2C Address Selection
      3. 7.5.3 I2C Speed Modes
      4. 7.5.4 Slave Mode Operations
        1. 7.5.4.1 Receive Mode
        2. 7.5.4.2 Transmit Mode:
      5. 7.5.5 Writing the Registers
      6. 7.5.6 Reading the Registers
    6. 7.6 Register Map
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Using an Operational Amplifier Between Multiplexer Output and ADC Input
      2. 8.1.2 Using an Operational Amplifier and RC Filter Between Multiplexer Output and ADC Input
      3. 8.1.3 Using an RC Filter Between Multiplexer Output and ADC Input
      4. 8.1.4 Operational Amplifier With Filter and Gain Option Between Multiplexer Output and ADC Input
      5. 8.1.5 Driving an RC Filter With an Operational Amplifier Between Multiplexer Output and ADC Input
      6. 8.1.6 Average Power Consumption
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Setting the Throughput
        2. 8.2.2.2 Selecting the Operational Amplifier
        3. 8.2.2.3 Selecting the RC Filter
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントの更新通知を受け取る方法
    2. 11.2 コミュニティ・リソース
    3. 11.3 商標
    4. 11.4 静電気放電に関する注意事項
    5. 11.5 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

Application Information

The ADS7924 device provides a break-out point in the signal path between the multiplexer output and the ADC input for external signal conditioning, if desired. Typical uses include adding an operational amplifier, such as the TLV2780, along with an RC filter circuit. Different application circuits are described in following sections.

Using an Operational Amplifier Between Multiplexer Output and ADC Input

Adding an operational amplifier provides a high input impedance to the sensor source and buffers the capacitive ADC input from high-impedance sensor circuits, as shown in Figure 57. High-impedance input signals can be momentarily disrupted when coupled directly to a capacitive input like that of a sampling ADC. This disruption can create errors when sampling. The use of an operational amplifier is recommended in these cases.

ADS7924 ai_app_opa_bas482.gif Figure 57. Sensor Data Acquisition With TLV2780 Buffer Amplifier

Using an Operational Amplifier and RC Filter Between Multiplexer Output and ADC Input

Placing an RC low-pass filter in the signal path allows for filtering out noise. The RC component values should allow for sufficient settling time when changing from channel to channel. The time required for a full-scale input signal to settle to within 1LSB of a 12-bit ADC is given by Equation 3:

Equation 3. Settling Time = R × C × ln(212)

RX and C form a low-pass filter for removing sensor and noise from other sources at the operational amplifier input pin. The low-pass bandwidth is given by Equation 4:

Equation 4. f–3dB = 1/(2πRC)

The f–3dB should be chosen so that the signals of interest are within half of the programmable sampling frequency. The noise bandwidth is given by Equation 5:

Equation 5. fNB = 1/(4RC)

This term should be set to reduce noise bandwidth but still allow for enough settling time. The ADS7924 has internal registers ACQCONFIG (address = 14h), PWRCONF (address = 15h), and SLPCONFIG (address = 13h) that can be programmed to slow down the channel-to-channel power up, acquisition, and sleep periods if needed to allow for a longer settling time requirement.

In Figure 58, R is the sum of the sensor output impedance RSENSOR, the internal MUX resistance RMUX (approximately 60 Ω), and external resistor RX. The primary benefit of having the filter at the input of the operational amplifier is that the amplifier does not have to drive the filter, which can cause instability with large capacitor values that may be needed to filter noise to low levels.

The TLV2780 typically powers up from a shutdown state in 800 ns. This period is well within the ADS7924 minimum acquisition time of 6μs. Setting the PWRCONFIG register (address = 15h) allows for more time if another operational amplifier with a shutdown feature is used.

ADS7924 ai_app_opa_rc_bas482.gif
NOTE: f–3dB BW = 159 kHz, R = 1 kΩ, and C = 1 nF where R = RMUX + RSENSOR + RX.
Figure 58. Sensor Data Acquisition With Filter and TLV2780 Buffer Amplifier

Using an RC Filter Between Multiplexer Output and ADC Input

For applications where low-output impedance signals are provided for the ADS7924 inputs, a simple RC filter may suffice, as shown in Figure 59.

ADS7924 ai_app_rc_filt_bas482.gif
NOTE: f–3dB BW = 159 kHz, R = 1 kΩ, and C = 1 nF where R = RMUX + RSENSOR + RX, C = CX + CADCIN, RMUX is approximately 60 Ω, and CADCIN is approximately 15 pF.
Figure 59. Sensor Data Acquisition With Filter Only

CX should be greater than 200 pF, if possible. When coupled directly to the ADC input, using a capacitor with this value allows for faster settling when scanning between channels.

Operational Amplifier With Filter and Gain Option Between Multiplexer Output and ADC Input

Both filtering and gain are added in Figure 60. Gain is given by Equation 6:

Equation 6. Gain = 1 + R1/R2

where

  • R is the sum of the sensor output impedance RSENSOR, the internal MUX resistance RMUX (approximately 60 Ω), and the external resistor RX.
ADS7924 ai_app_opa_filt_g_bas482.gif

NOTE:

f–3dB BW = 159 kHz, R = 1 kΩ, and C = 1 nF where R = RMUX + RSENSOR + RX, and RMUX is approximately 60 Ω. Gain = 1 + R1 / R2.
Figure 60. Sensor Data Acquisition With Gain Set Resistors, Filter, and TLV2780 Buffer Amplifier

Driving an RC Filter With an Operational Amplifier Between Multiplexer Output and ADC Input

A filter can be placed at the output of the operational amplifier, as shown in Figure 61. Ensure that the operational amplifier is capable of driving the RC filter circuit without the operational amplifier becoming unstable. One of the benefits of this circuit is that the operational amplifier noise is filtered along with sensor and other system noise right at the ADC input pin.

ADS7924 ai_app_drv_adcin_bas482.gif

NOTE:

C = 200 pF, R = 1 kΩ, and the capacitance at the ADCIN pin is approximately 15 pF.
Figure 61. Sensor Data Acquisition With an Operational Amplifier Driving an RC Filter

Average Power Consumption

With its fast conversion time and programmable sleep time with near-zero power, the ADS7924 allows periodic monitoring of the inputs with a very low average power dissipation, especially as the monitoring interval increases. The average current required can be calculated as the weighed average of the currents consumed during the power up, acquisition, converting, and sleep periods using Equation 7.

Equation 7. ADS7924 q_iave_bas482.gif

As an example, calculate the average current in the following configuration:

  • Mode programmed to Auto-Scan with Sleep
  • Power-up time (tPU) programmed to '0'
  • Acquisition time (tACQ) programmed to 6 μs
  • Sleep time (tSLEEP) programmed to 2.5 ms
  • AVDD = 2.2 V

Looking at Figure 27, the cycle time is seen to equal tCYCLE = 4tPU + 4tACQ + 4tCONV + 4tSLEEP = 4(0) + 4(6 μs) + 4(4 μs) + 4(2.5 ms) = 10.04 ms.

Table 5 lists the supply current for different supply voltages and operating conditions. Using the data for 2.2 V with the calculated cycle time in Equation 7 gives the following average current:

Equation 8. ADS7924 q_ave_curr_bas482.gif

Table 5. Supply Current for Various Operating Conditions

STATUS AVDD
5 V 3.3 V 2.7 V 2.2 V
Idle 1 µA 1 µA 1 µA 1 µA
Awake 45 µA 25 µA 20 µA 15 µA
Acquiring 315 µA 285 µA 275 µA 270 µA
Converting 730 µA 520 µA 450 µA 400 µA
Sleeping 3 µA 2 µA 1.5 µA 1.25 µA

The acquisition, conversion, and sleep times are multiplied by 4 because these are repeated four times in one cycle when in auto-scan with sleep mode.

Average power dissipation for the previous configuration where all four inputs are monitored every 10 ms is (2.2 V)(2.5 μA) = 5.5 μW.

Figure 3 and Figure 4 plot Equation 7 to help illustrate the relationship between cycle time and average power dissipation.

Typical Application

Figure 62 shows a 0-V to 10-V Input DAQ Circuit with a DC accuracy of 0.1%.

ADS7924 apps_1_bas482.gif Figure 62. 0-V to 10-V Input DAQ Circuit

Design Requirements

Table 6 shows the design parameters for this typical application.

Table 6. Design Parameters

DESIGN PARAMETER DESIGN GOAL
Throughput 100 SPS
DC Accuracy 0.1%
Full Scale Step Settling 20 µs
DC Noise at input of ADC 200 µV RMS
Input Impedance 40 kΩ

Detailed Design Procedure

Setting the Throughput

The throughput was set by selecting a sleep time of 40 ms, sleep divider of 4 and acquisition time of 6 µs.

Selecting the Operational Amplifier

The key parameters for selecting the operational amplifier for this circuit are noise, offset voltage and input bias current. The offset voltage and input bias current affect the DC accuracy whereas the noise of the amplifier increases the total noise at the input of ADC, the total noise at the input of ADC (Vn) can be calculated by Equation 9. Vn must be less than 200-µV RMS for this circuit design.

Equation 9. ADS7924 q_noise_bas482.gif

where

  • en_RMS is the input voltage noise density of the amplifier.
  • VN_ADC is the DC noise of the ADC. For ADS7924 , DC Noise is specified as 0.125 LSB RMS.
  • V 1/f_AMP_PP is the peak to peak low-frequency noise at the input of amplifier.
  • f-3dB is the bandwidth of RC filter at the output of amplifier.

OPA313 is selected for this design for its low noise (25 nv/√Hz), low offset voltage (0.5 mV) and low input bias current (0.2 pA).

Selecting the RC Filter

The RC filter at the output of amplifier affect full scale settling time and noise at the input of ADC. Full scale settling time can be calculated using Equation 3 and the noise at input of ADC can be calculated using Equation 9. A value of 499 Ω and 2.2 nF is used for achieving the full scale settling time of 20 µs and total DC noise of less than 200 µV RMS.

Application Curves

ADS7924 C001_SBAS482.png
Max Error = -0.0035% Min Error = -0.067%
Figure 63. Error vs Input Voltage
ADS7924 C002_SBAS482.png
Sigma = 0.05 Noise = 61µV RMS
Figure 64. Number of Hits vs Output Code