JAJSIU4B April   2020  – June 2022 AMC1300B-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics
    10. 6.10 Switching Characteristics
    11. 6.11 Timing Diagram
    12. 6.12 Insulation Characteristics Curves
    13. 6.13 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog Input
      2. 7.3.2 Isolation Channel Signal Transmission
      3. 7.3.3 Analog Output
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Shunt Resistor Sizing
        2. 8.2.2.2 Input Filter Design
        3. 8.2.2.3 Differential to Single-Ended Output Conversion
      3. 8.2.3 Application Curve
    3. 8.3 What to Do and What Not to Do
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.9 Electrical Characteristics

minimum and maximum specifications apply from TA = –40°C to +125°C, VDD1 = 3.0 V to 5.5 V, VDD2 = 3.0 V to 5.5 V, INP = –250 mV to +250 mV, and INN = GND1; typical specifications are at TA = 25°C, VDD1 = 5 V, and VDD2 = 3.3 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ANALOG INPUT
VCMov Common-mode overvoltage detection level (VINP + VINN) / 2 to GND1 VDD1 – 2 V
Hysteresis of common-mode overvoltage detection level 60 mV
VOS Input offset voltage(1) Initial, at TA = 25°C, INP = INN = GND1 –0.2 ±0.01 0.2 mV
TCVOS Input offset drift(1)(4) –0.9 ±0.1 0.9 µV/°C
CMRR Common-mode rejection ratio fIN = 0 Hz, VCM min ≤ VCM ≤ VCM max –100 dB
fIN = 10 kHz, VCM min ≤ VCM ≤ VCM max –98
RIN Single-ended input resistance INN = GND1 19 kΩ
RIND Differential input resistance 22 kΩ
IIB Input bias current INP = INN = GND1; IIB = (IIBP + IIBN) / 2 –41 –30 –24 µA
IIO Input offset current IIO = IIBP – IIBN; INP = INN = GND1 ±5 nA
CIN Single-ended input capacitance INN = GND1, fIN = 275 kHz 2 pF
CIND Differential input capacitance fIN = 275 kHz 1 pF
ANALOG OUTPUT
Nominal gain 8.2 V/V
EG Gain error(1) at TA = 25°C –0.3% ±0.04% 0.3%
TCEG Gain drift(1)(5) –30 ±5 30 ppm/°C
Nonlinearity(1) –0.03% ±0.01% 0.03%
THD Total harmonic distortion(3) fIN = 10 kHz –85 dB
Output noise INP = INN = GND1, fIN = 0 Hz,
BW = 100 kHz brickwall filter		 230 µVRMS
SNR Signal-to-noise ratio fIN = 1 kHz, BW = 10 kHz 81.5 85 dB
fIN = 10 kHz, BW = 100 kHz 72
PSRR Power-supply rejection ratio(2) PSRR vs VDD1, at DC –103 dB
PSRR vs VDD1,
100-mV and 10-kHz ripple		 –96
PSRR vs VDD2, at DC –106
PSRR vs VDD2,
100-mV and 10-kHz ripple		 –86
VCMout Common-mode output voltage 1.39 1.44 1.49 V
VCLIPout Clipping differential output voltage VOUT = (VOUTP – VOUTN);
|VIN| = |VINP – VINN| > |VClipping|		 –2.52 ±2.49 2.52 V
VFailsafe Failsafe differential output voltage VCM ≥ VCMov, or VDD1 missing –2.63 –2.57 –2.53 V
BW Output bandwidth 250 310 kHz
ROUT Output resistance On OUTP or OUTN < 0.2 Ω
Output short-circuit current On OUTP or OUTN, sourcing or sinking,
INN = INP = GND1, outputs shorted to
either GND2 or VDD2		 14 mA
CMTI Common-mode transient immunity |GND1 – GND2| = 1 kV 100 150 kV/µs
POWER SUPPLY
VDD1UV VDD1 undervoltage detection threshold voltage VDD1 falling 2.4 2.6 2.8 V
IDD1 High-side supply current 3.0 V ≤ VDD1 ≤ 3.6 V 6.3 8.5 mA
4.5 V ≤ VDD1 ≤ 5.5 V 7.2 9.8
IDD2 Low-side supply current 3.0 V ≤ VDD2 ≤ 3.6 V 5.3
7.2

 mA
4.5 V ≤ VDD2 ≤ 5.5 V 5.9 8.1
(1) The typical value includes one standard deviation (sigma) at nominal operating conditions.
(2) This parameter is input referred.
(3) THD is the ratio of the rms sum of the amplitues of first five higher harmonics to the amplitude of the fundamental.
(4) Offset error temperature drift is calculated using the box method, as described by the following equation:
TCVOS = (VOS,MAX - VOS,MIN) / TempRange where VOS,MAX and VOS,MIN refer to the maximum and minimum VOS values measured within the temperature range (–40 to 125℃).
(5) Gain error temperature drift is calculated using the box method, as described by the following equation:
TCEG (ppm) = ((EG,MAX - EG,MIN) / TempRange) x 104 where EG,MAX and EG,MIN refer to the maximum and minimum EG values (in %) measured within the temperature range (–40 to 125℃).