SLUS811A November   2008  – June 2015

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4  Simplified Schematic
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Overvoltage Protection
      2. 8.3.2 Input Overcurrent Protection
      3. 8.3.3 Battery Overvoltage Protection
      4. 8.3.4 Thermal Protection
      5. 8.3.5 Enable Function
      6. 8.3.6 Fault Indication
    4. 8.4 Device Functional Modes
      1. 8.4.1 OPERATION Mode
      2. 8.4.2 POWER-DOWN Mode
      3. 8.4.3 POWER-ON RESET Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Powering Accessories
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Selection of RBAT
        2. 9.2.2.2 Selection of RCE, RFAULT, and RPU
        3. 9.2.2.3 Selection of Input and Output Bypass Capacitors
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8 Detailed Description

8.1 Overview

The bq24314A device is a highly integrated circuit designed to provide protection to Li-ion batteries from failures of the charging circuit. The device continuously monitors the input voltage, the input current, and the battery voltage. In case of an input overvoltage condition, the device immediately removes power from the charging circuit by turning off an internal switch. In the case of an overcurrent condition, it limits the system current at the threshold value, and if the overcurrent persists, switches the pass element OFF after a blanking period. If the battery voltage rises to an unsafe level, the device disconnects power from the charging circuit until the battery voltage returns to an acceptable value. Additionally, the device also monitors its own die temperature and switches off if it exceeds 140°C. The input overcurrent threshold is user-programmable. The device can be controlled by a processor and also provides status information about fault conditions to the host.

8.2 Functional Block Diagram

bq24314A sim_bd_lus763.gifFigure 9. Simplified Block Diagram

8.3 Feature Description

8.3.1 Input Overvoltage Protection

The bq24314A device integrates an input overvoltage protection feature to protect downstream devices from faulty input sources. If the input voltage rises above VOVP, the internal FET Q1 is turned off, removing power from the circuit. As shown in Figure 16 to Figure 17, the response is very rapid, with the FET turning off in less than a microsecond. The FAULT pin is driven low. When the input voltage returns below VOVP – Vhys(OVP) (but is still above UVLO), the FET Q1 is turned on again after a deglitch time of tON(OVP) to ensure that the input supply has stabilized. Figure 18 shows the recovery from input OVP.

8.3.2 Input Overcurrent Protection

The overcurrent threshold is programmed by a resistor RILIM connected from the ILIM pin to VSS. Figure 4 shows the OCP threshold as a function of RILIM, and may be approximated by the following equation:

Equation 1. IOCP = 25 ÷ RILIM (current in A, resistance in kΩ),

where

  • RILIM must be from between 15 kΩ to 90 kΩ

If the load current tries to exceed the IOCP threshold, the device limits the current for a blanking duration of tBLANK(OCP). If the load current returns to less than IOCP before tBLANK(OCP) times out, the device continues to operate. However, if the overcurrent situation persists for tBLANK(OCP), the FET Q1 is turned off for a duration of tREC(OCP), and the FAULT pin is driven low. The FET is then turned on again after tREC(OCP) and the current is monitored all over again. Each time an OCP fault occurs, an internal counter is incremented. If 15 OCP faults occur in one charge cycle, the FET is turned off permanently. The counter is cleared either by removing and re-applying input power, or by disabling and re-enabling the device with the CE pin. Figure 19 to Figure 21 show what happens in an overcurrent fault.

To prevent the input voltage from spiking up due to the inductance of the input cable, Q1 is turned off slowly, resulting in a soft-stop, as shown in Figure 21.

8.3.3 Battery Overvoltage Protection

The battery overvoltage threshold BVOVP is internally set to 4.35 V. If the battery voltage exceeds the BVOVP threshold, the FET Q1 is turned off, and the FAULT pin is driven low. The FET is turned back on once the battery voltage drops to BVOVP – Vhys(Bovp) (see Figure 22 and Figure 23). Each time a battery overvoltage fault occurs, an internal counter is incremented. If 15 such faults occur in one charge cycle, the FET is turned off permanently. The counter is cleared either by removing and re-applying input power, or by disabling and re-enabling the device with the CE pin. In the case of a battery overvoltage fault, Q1 is switched OFF gradually (see Figure 22).

8.3.4 Thermal Protection

If the junction temperature of the device exceeds TJ(OFF), the FET Q1 is turned off, and the FAULT pin is driven low. The FET is turned back on when the junction temperature falls below TJ(OFF) – TJ(OFF-HYS).

8.3.5 Enable Function

The device has an enable pin which can be used to enable or disable the device. When the CE pin is driven high, the internal FET is turned off. When the CE pin is low, the FET is turned on if other conditions are safe. The OCP counter and the Bat-OVP counter are both reset when the device is disabled and re-enabled. The CE pin has an internal pulldown resistor and can be left floating. Note that the FAULT pin functionality is also disabled when the CE pin is high.

8.3.6 Fault Indication

The FAULT pin is an active-low open-drain output. It is in a high-impedance state when operating conditions are safe, or when the device is disabled by setting CE high. With CE low, the FAULT pin goes low whenever any of these events occurs:

  • Input overvoltage
  • Input overcurrent
  • Battery overvoltage
  • IC overtemperature

8.4 Device Functional Modes

8.4.1 OPERATION Mode

The device continuously monitors the input voltage, the input current, and the battery voltage. As long as the input voltage is less than VOVP, the output voltage tracks the input voltage (less the drop caused by RDSON of Q1). During fault conditions, the internal FET is turned off and the output is isolated from the input source.

8.4.2 POWER-DOWN Mode

The device remains in POWER-DOWN mode when the input voltage at the IN pin is below the undervoltage threshold UVLO. The FET Q1 connected between IN and OUT pins is off, and the status output, FAULT, is set to Hi-Z. See Figure 10.

8.4.3 POWER-ON RESET Mode

The device resets when the input voltage at the IN pin exceeds the UVLO threshold. All internal counters and other circuit blocks are reset. The device then waits for duration tDGL(PGOOD) for the input voltage to stabilize. If, after tDGL(PGOOD), the input voltage and battery voltage are safe, FET Q1 is turned ON. The device has a soft-start feature to control the inrush current. The soft-start minimizes the ringing at the input (the ringing occurs because the parasitic inductance of the adapter cable and the input bypass capacitor form a resonant circuit). Figure 14 shows the power-up behavior of the device. Because of the deglitch time at power-on, if the input voltage rises rapidly to beyond the OVP threshold, the device will not switch on at all, instead it will go into PROTECTION mode and indicate a fault on the FAULT pin, as shown in Figure 15.

bq24314A flo_cht_lus763.gifFigure 10. Flow Diagram