SLUSC03C August   2014  – December 2016

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Battery Only
      2. 8.3.2  Adapter Detect and ACOK Output
        1. 8.3.2.1 Adapter Overvoltage (ACOVP)
      3. 8.3.3  System Power Selection
      4. 8.3.4  System Power Up
        1. 8.3.4.1 Dynamic Power Management (IDPM) and Supplement Mode
        2. 8.3.4.2 Minimum System Voltage Regulation and LDO Mode
      5. 8.3.5  Current and Power Monitor
        1. 8.3.5.1 High Accuracy Current Sense Amplifier (IADP and IBAT)
        2. 8.3.5.2 High Accuracey Power Sense Amplifier (PMON)
      6. 8.3.6  Processor Hot Indication for CPU Throttling
      7. 8.3.7  Converter Operation
        1. 8.3.7.1 Continuous Conduction Mode (CCM)
        2. 8.3.7.2 Discontinuous Conduction Mode (DCM)
        3. 8.3.7.3 PFM Mode
        4. 8.3.7.4 Switching Frequency Adjust
      8. 8.3.8  Learn Mode
      9. 8.3.9  Charger Timeout
      10. 8.3.10 Device Protection Features
        1. 8.3.10.1 Input Overcurrent Protection (ACOC)
        2. 8.3.10.2 Converter Overcurrent Protection
        3. 8.3.10.3 Battery Overvoltage Protection (BATOVP)
        4. 8.3.10.4 System Overvoltage Protection (SYSOVP)
        5. 8.3.10.5 Thermal Shutdown Protection (TSHUT)
    4. 8.4 Device Functional Modes
      1. 8.4.1 Battery Charging
      2. 8.4.2 System Voltage Regulation with Narrow VDC Architecture
    5. 8.5 Programming
      1. 8.5.1 SMBus Interface
        1. 8.5.1.1 SMBus Write-Word and Read-Word Protocols
        2. 8.5.1.2 Timing Diagrams
      2. 8.5.2 I2C Serial Interface
        1. 8.5.2.1 Data Validity
        2. 8.5.2.2 START and STOP Conditions
        3. 8.5.2.3 Byte Format
        4. 8.5.2.4 Acknowledge (ACK) and Not Acknowledge (NACK)
        5. 8.5.2.5 Slave Address and Data Direction Bit
        6. 8.5.2.6 Single Read and Write
        7. 8.5.2.7 Multi-Read and Multi-Write
    6. 8.6 Register Maps
      1. 8.6.1 ChargeOption0 Register
      2. 8.6.2 ChargeOption1 Register
      3. 8.6.3 ChargeOption2 Register
      4. 8.6.4 ProchotOption0 Register
      5. 8.6.5 ProchotOption1 Register
      6. 8.6.6 Setting the Charge Current
      7. 8.6.7 Setting the Maximum Charge Voltage
      8. 8.6.8 Setting the Minimum Charge Voltage
      9. 8.6.9 Setting Input Current
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application, bq24770
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Reverse Input Voltage Protection
        2. 9.2.2.2 Inductor Selection
        3. 9.2.2.3 Input Capacitor
        4. 9.2.2.4 Output Capacitor
        5. 9.2.2.5 Power MOSFETs Selection
        6. 9.2.2.6 Input Filter Design
      3. 9.2.3 Application Curves
      4. 9.2.4 Typical Application, bq24773
        1. 9.2.4.1 Design Requirements
        2. 9.2.4.2 Detailed Design Procedure
        3. 9.2.4.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
      1. 11.2.1 Layout Consideration of Current Path
      2. 11.2.2 Layout Consideration of Short Circuit Protection
  12. 12Device and Documentation Support
    1. 12.1 Related Links
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

Application Information

The bq2477xEVM-540 evaluation module (EVM) is a complete charger module for evaluating the bq2477x. The application curves were taken using the bq24770EVM-540. Refer to the EVM user's guide (SLUUAO3) for EVM information.

Typical Application, bq24770

bq24770 bq24773 sch_bq24770_slusc03.gif Figure 21. bq24770 Application Schematic

Design Requirements

DESIGN PARAMETER EXAMPLE VALUE
Input Voltage(2) 17.7V < Adapter Voltage < 24V
Input Current Limit (2) 3.2A for 65W adapter
Battery Charge Voltage(1) 8400mV for 2s battery
Battery Charge Current(1) 4096mA for 3s battery
Minimum System Voltage(1) 6144mA for 2s battery
Refer to battery specification for settings.
Refer to adapter specification for settings for Input Voltage and Input Current Limit.

Detailed Design Procedure

The parameters are configurable using the evaluation software.

The simplified application circuit (see Figure 21) shows the minimum capacitance requirements for each pin. Inductor, capacitor, and MOSFET selection are explained in the rest of this section. Refer to the EVM user's guide (SLUUAO3) for the full application schematic.

Reverse Input Voltage Protection

Q6, R12, and R13 in Figure 22 give system and IC protection from reversed adapter voltage. In normal operation, Q6 is turned off by negative Vgs. When adapter voltage is reversed, Q6 Vgs is positive. As a result, Q6 turns on to short gate and source of Q2 so that Q2 is off. Q2 body diode blocks negative voltage to system. However, CMSRC and ACDRV pins need R3 and R4 to limit the current due to the ESD diode of these pins when turned on. Q6 must has low Vgs threshold voltage and low Qgs gate charge so it turns on before Q2 turns on. R3 and R4 must have enough power rating for the power dissipation when the ESD diode is on. If Q1 is replaced by Schottky diode for reverse adapter voltage protection, no extra small MOSFET and resistors are needed.

bq24770 bq24773 reverse_input_voltage_slusc03.gif Figure 22. Reverse Input Voltage Protection Circuit

Inductor Selection

The bq2477x has three selectable fixed switching frequency. Higher switching frequency allows the use of smaller inductor and capacitor values. Inductor saturation current should be higher than the charging current (ICHG) plus half the ripple current (IRIPPLE):

Equation 2. bq24770 bq24773 eq4_lusa79.gif

The inductor ripple current depends on input voltage (VIN), duty cycle (D = VOUT/VIN), switching frequency (fS) and inductance (L):

Equation 3. bq24770 bq24773 eq5_lusa79.gif

The maximum inductor ripple current happens with D = 0.5 or close to 0.5. For example, the battery charging voltage range is from 9V to 12.6V for 3-cell battery pack. For 20 V adapter voltage, 10 V battery voltage gives the maximum inductor ripple current. Another example is 4-cell battery, the battery voltage range is from 12 V to 16.8 V, and 12 V battery voltage gives the maximum inductor ripple current.

Usually inductor ripple is designed in the range of (20-40%) maximum charging current as a trade-off between inductor size and efficiency for a practical design.

Input Capacitor

Input capacitor should have enough ripple current rating to absorb input switching ripple current. The worst case RMS ripple current is half of the charging current when duty cycle is 0.5. If the converter does not operate at 50% duty cycle, then the worst case capacitor RMS current occurs where the duty cycle is closest to 50% and can be estimated by Equation 4:

Equation 4. bq24770 bq24773 eq6_lusa79.gif

Low ESR ceramic capacitor such as X7R or X5R is preferred for input decoupling capacitor and should be placed to the drain of the high side MOSFET and source of the low side MOSFET as close as possible. Voltage rating of the capacitor must be higher than normal input voltage level. 25 V rating or higher capacitor is preferred for 19-20 V input voltage. 10-20 μF capacitance is suggested for typical of 3-4 A charging current.

Ceramic capacitors show a dc-bias effect. This effect reduces the effective capacitance when a dc-bias voltage is applied across a ceramic capacitor, as on the input capacitor of a charger. The effect may lead to a significant capacitance drop, especially for high input voltages and small capacitor packages. See the manufacturer's datasheet about the performance with a dc bias voltage applied. It may be necessary to choose a higher voltage rating or nominal capacitance value in order to get the required value at the operating point.

Output Capacitor

Output capacitor also should have enough ripple current rating to absorb output switching ripple current. The output capacitor RMS current is given:

Equation 5. bq24770 bq24773 eq7_lusa79.gif

The bq2477x has internal loop compensator. To get good loop stability, the resonant frequency of the output inductor and output capacitor should be designed between 10 kHz and 20 kHz. The preferred ceramic capacitor is 25V X7R or X5R for output capacitor. 10-20μF capacitance is suggested for a typical of 3-4A charging current. Place the capacitors after charging current sensing resistor to get the best charge current regulation accuracy.

Ceramic capacitors show a dc-bias effect. This effect reduces the effective capacitance when a dc-bias voltage is applied across a ceramic capacitor, as on the output capacitor of a charger. The effect may lead to a significant capacitance drop, especially for high output voltages and small capacitor packages. See the manufacturer's data sheet about the performance with a dc bias voltage applied. It may be necessary to choose a higher voltage rating or nominal capacitance value in order to get the required value at the operating point.

Power MOSFETs Selection

Two external N-channel MOSFETs are used for a synchronous switching battery charger. The gate drivers are internally integrated into the IC with 6V of gate drive voltage. 30 V or higher voltage rating MOSFETs are preferred for 19-20 V input voltage.

Figure-of-merit (FOM) is usually used for selecting proper MOSFET based on a tradeoff between the conduction loss and switching loss. For the top side MOSFET, FOM is defined as the product of a MOSFET's on-resistance, RDS(ON), and the gate-to-drain charge, QGD. For the bottom side MOSFET, FOM is defined as the product of the MOSFET's on-resistance, RDS(ON), and the total gate charge, QG.

Equation 6. FOMtop = RDS(on) x QGD; FOMbottom = RDS(on) x QG

The lower the FOM value, the lower the total power loss. Usually lower RDS(ON) has higher cost with the same package size.

The top-side MOSFET loss includes conduction loss and switching loss. It is a function of duty cycle (D=VOUT/VIN), charging current (ICHG), MOSFET's on-resistance (RDS(ON)), input voltage (VIN), switching frequency (fS), turn on time (ton) and turn off time (toff):

Equation 7. bq24770 bq24773 eq9_lusa79.gif

The first item represents the conduction loss. Usually MOSFET RDS(ON) increases by 50% with 100°C junction temperature rise. The second term represents the switching loss. The MOSFET turn-on and turn-off times are given by:

Equation 8. bq24770 bq24773 eq10_lusa79.gif

where Qsw is the switching charge, Ion is the turn-on gate driving current and Ioff is the turn-off gate driving current. If the switching charge is not given in MOSFET datasheet, it can be estimated by gate-to-drain charge (QGD) and gate-to-source charge (QGS):

Equation 9. bq24770 bq24773 eq11_lusa79.gif

Gate driving current can be estimated by REGN voltage (VREGN), MOSFET plateau voltage (Vplt), total turn-on gate resistance (Ron) and turn-off gate resistance (Roff) of the gate driver:

Equation 10. bq24770 bq24773 eq12_lusa79.gif

The conduction loss of the bottom-side MOSFET is calculated with the following equation when it operates in synchronous continuous conduction mode:

Equation 11. Pbottom = (1 - D) x ICHG 2 x RDS(on)

When charger operates in non-synchronous mode, the bottom-side MOSFET is off. As a result all the freewheeling current goes through the body-diode of the bottom-side MOSFET. The body diode power loss depends on its forward voltage drop (VF), non-synchronous mode charging current (INONSYNC), and duty cycle (D).

Equation 12. PD = VF x INONSYNC x (1 - D)

The maximum charging current in non-synchronous mode can be up to 0.25 A for a 10 mΩ charging current sensing resistor or 0.5 A if battery voltage is below 2.5 V. The minimum duty cycle happens at lowest battery voltage. Choose the bottom-side MOSFET with either an internal Schottky or body diode capable of carrying the maximum non-synchronous mode charging current.

Input Filter Design

During adapter hot plug-in, the parasitic inductance and input capacitor from the adapter cable form a second order system. The voltage spike at VCC pin maybe beyond IC maximum voltage rating and damage IC. The input filter must be carefully designed and tested to prevent over voltage event on VCC pin.

There are several methods to damping or limit the over voltage spike during adapter hot plug-in. An electrolytic capacitor with high ESR as an input capacitor can damp the over voltage spike well below the IC maximum pin voltage rating. A high current capability TVS Zener diode can also limit the over voltage level to an IC safe level. However these two solutions may not have low cost or small size.

A cost effective and small size solution is shown in Figure 23. The R1 and C1 are composed of a damping RC network to damp the hot plug-in oscillation. As a result the over voltage spike is limited to a safe level. D1 is used for reverse voltage protection for VCC pin. C2 is VCC pin decoupling capacitor and it should be place to VCC pin as close as possible. C2 value should be less than C1 value so R1 can dominant the equivalent ESR value to get enough damping effect. R2 is used to limit inrush current of D1 to prevent D1 getting damage when adapter hot plug-in. R2 and C2 should have 10 µs time constant to limit the dv/dt on VCC pin to reduce inrush current when adapter hot plug in. R1 has high inrush current. R1 package must be sized enough to handle inrush current power loss according to resistor manufacturer’s data sheet. The filter components value always need to be verified with real application and minor adjustments may need to fit in the real application circuit.

bq24770 bq24773 input_flt_lusbw0.gif Figure 23. Input Filter

Application Curves

bq24770 bq24773 scope_1_slusc03.png
Figure 24. VIN, ACDET, REGN, and ACOK During Power Up
bq24770 bq24773 scope_3_slusc03.png
Figure 26. Charge Enable From 0x14()
bq24770 bq24773 scope_5_slusc03.png
VIN = 19.5 V I(SYS) = 200 mA CELL = Float
Figure 28. PFM Switching
bq24770 bq24773 scope_7_slusc03.png
VIN = 19.5 V CELL = Float
Figure 30. Transient Response, Charge Disabled, Not in DPM
bq24770 bq24773 scope_9_slusc03.png
VIN = 19.5 V CELL = Float
Figure 32. Transient Response, Charge Disabled, In Supplement Mode
bq24770 bq24773 scope_11_slusc03.png
VIN = 19.5 V CELL = Float VBAT 7.5 V
Figure 34. Transient Response, Charge Enable, In Supplement Mode
bq24770 bq24773 scope_2_slusc03.png
Figure 25. VIN, VSYS, PH and ACOK During Power Up
bq24770 bq24773 scope_4_slusc03.png
Figure 27. Current Disabled
bq24770 bq24773 scope_6_slusc03.png
VIN = 19.5 V I(SYS) = 1.5 A CELL = Float
Figure 29. PWM Switching
bq24770 bq24773 scope_8_slusc03.png
VIN = 19.5 V CELL = Float
Figure 31. Transient Response, Charge Disabled, In DPM
bq24770 bq24773 scope_10_slusc03.png
VIN = 19.5 V CELL = Float VBAT 7.5 V
Figure 33. Transient Response, Charge Enable, In DPM
bq24770 bq24773 scope_12_slusc03.png
IDPM 3072 mA ICHG 2432mA VBAT 11 V
ICRIT 150% × IDPM
Figure 35. PROCHOT From Adapter Removal

Typical Application, bq24773

The bq2477xEVM-540 evaluation module (EVM) is a complete charger module for evaluating the bq2477x. The application curves were taken using the bq24770EVM-540. Refer to the EVM user's guide (SLUUAO3) for EVM information.

bq24770 bq24773 sch_bq24773_slusc03.gif Figure 36. bq24773 Typical Schematic

Design Requirements

Refer to Typical Application, bq24770 for the Design Requirements.

Detailed Design Procedure

Refer to Typical Application, bq24770 for the Detailed Design Procedure.

Application Curves

Refer to Typical Application, bq24770 for the Application Curves.