SLUSD33A November   2017  – January 2021 BQ25122

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Ship Mode
        1. 9.3.1.1 Ship Mode Entry and Exit
      2. 9.3.2  High Impedance Mode
      3. 9.3.3  Active Battery Only Connected
      4. 9.3.4  Voltage Based Battery Monitor
      5. 9.3.5  Sleep Mode
      6. 9.3.6  Input Voltage Based Dynamic Power Management (VIN(DPM))
      7. 9.3.7  Input Overvoltage Protection and Undervoltage Status Indication
      8. 9.3.8  Battery Charging Process and Charge Profile
      9. 9.3.9  Dynamic Power Path Management Mode
      10. 9.3.10 Battery Supplement Mode
      11. 9.3.11 Default Mode
      12. 9.3.12 Termination and Pre-Charge Current Programming by External Components (IPRETERM)
      13. 9.3.13 Input Current Limit Programming by External Components (ILIM)
      14. 9.3.14 Charge Current Programming by External Components (ISET)
      15. 9.3.15 Safety Timer and Watchdog Timer
      16. 9.3.16 External NTC Monitoring (TS)
      17. 9.3.17 Thermal Protection
      18. 9.3.18 Typical Application Power Dissipation
      19. 9.3.19 Status Indicators ( PG and INT)
      20. 9.3.20 Chip Disable ( CD)
      21. 9.3.21 Buck (PWM) Output
      22. 9.3.22 Load Switch / LDO Output and Control
      23. 9.3.23 Manual Reset Timer and Reset Output ( MR and RESET)
    4. 9.4 Device Functional Modes
    5. 9.5 Programming
      1. 9.5.1 Serial Interface Description
      2. 9.5.2 F/S Mode Protocol
    6. 9.6 Register Maps
      1. 9.6.1  Status and Ship Mode Control Register
      2. 9.6.2  Faults and Faults Mask Register
      3. 9.6.3  TS Control and Faults Masks Register
      4. 9.6.4  Fast Charge Control Register
      5. 9.6.5  Termination/Pre-Charge
      6. 9.6.6  Battery Voltage Control Register
      7. 9.6.7  SYS VOUT Control Register
      8. 9.6.8  Load Switch and LDO Control Register
      9. 9.6.9  Push-Button Control Register
      10. 9.6.10 ILIM and Battery UVLO Control Register
      11. 9.6.11 Voltage Based Battery Monitor Register
      12. 9.6.12 VIN_DPM and Timers Register
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Default Settings
        2. 10.2.2.2 Choose the Correct Inductance and Capacitance
        3. 10.2.2.3 Calculations
          1. 10.2.2.3.1 Program the Fast Charge Current (ISET)
          2. 10.2.2.3.2 Program the Input Current Limit (ILIM)
          3. 10.2.2.3.3 Program the Pre-charge/termination Threshold (IPRETERM)
          4. 10.2.2.3.4 TS Resistors (TS)
      3. 10.2.3 Application Performance Curves
        1. 10.2.3.1 Charger Curves
        2. 10.2.3.2 SYS Output Curves
        3. 10.2.3.3 Load Switch and LDO Curves
        4. 10.2.3.4 LS/LDO Output Curves
        5. 10.2.3.5 Timing Waveforms Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Support Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9.6.10 ILIM and Battery UVLO Control Register

Memory location 0x09h, Reset State: 0000 0010

Figure 9-20 ILIM and Battery UVLO Control Register
7 (MSB)6543210 (LSB)
00000010
WriteR/WR/WR/WR/WR/WR/WR/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 9-22 ILIM and Battery UVLO Control Register, Memory Location 1001
BitFieldTypeResetDescription
B7 (MSB)RESETWrite only0Write:
1 – Reset all registers to default values
0 – No effect
Read: Always get 0
B6R/W0N/A
B5INLIM_2R/W0Input Current Limit: 200 mA
B4INLIM_1R/W0Input Current Limit: 100 mA
B3INLIM_0R/W0Input Current Limit: 50 mA
B2BUVLO_2R/W0000, 001: RESERVED
010: BUVLO = 3.0 V
011: BUVLO = 2.8 V
100: BUVLO = 2.6 V
101: BULVO = 2.4 V
110: BUVLO = 2.2 V
111: BUVLO = 2.2V
B1BUVLO_1R/W1
B0 (LSB)BUVLO_0R/W0
INLIM Bits: Use INLIM bits to set the input current limit. The I(INLIM) is calculated using the following equation: I(INLIM) = 50 mA + I(INLIM)CODE x 50 mA. The default may be overridden by the external resistor on ILIM.