JAJSSA6 December 2023 BQ25960H
PRODUCTION DATA
Table 8-5 shows the features and modes of the device depending on the conditions of the device.
FUNCTIONS AVAILABLE | STATE | |||
---|---|---|---|---|
BATTERY ONLY VAC1/VAC2/ VBUS NOT PRESENT | INPUT PRESENT | INPUT PRESENT | INPUT PRESENT | |
CHARGE DISABLED | DURING SOFTSTART TIMER | AFTER SOFTSTART TIMER | ||
I2C allowed | X | X | X | X |
ADC | X | X | X | X |
ACDRV gate drive | X | X | X | |
VACOVP | X | X | X | |
TDIE_ALM | X | X | X | |
TDIE_TFL | X | X | X | |
BUSOVP_ALM | X | X | ||
BUSOCP_ALM | X | X | ||
BATOVP_ALM | X | X | ||
BATOCP_ALM | X | X | ||
BATUCP_ALM | X | X | ||
VOUTOVP | X | X | X | |
TSBUS_FLT | X | X | X | |
TSBAT_ FLT | X | X | X | |
BUSOVP | X | X | X | |
BATOVP | X | X | X | |
BATOCP | X | X | ||
BUSOCP | X | X | ||
BUSUCP | X | |||
BUSRCP | X | X |
Tripping any of these protections causes QB to be off and converter stops switching. Masking the fault or alarm does NOT disable the protection, but only keeps an INT from being triggered by the event. Disabling the fault or alarm protection other than BUSUCP holds that STAT and FLAG bits in reset, and also prevents an interrupt from occurring. Disable BUSUCP protection still sets STAT and FLAT bits and sends interrupt to alert host but keeps converter running when triggered.
When any OVP, OCP, RCP or overtemperature fault event is triggered, the CHG_EN bit is set to ‘0’ to disable charging, and the charging start-up sequence must be followed to begin charging again.