JAJSMC7 June   2020 CD54HCT20 , CD74HCT20

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Recommended Operating Conditions
    3. 6.3 Thermal Information
    4. 6.4 Electrical Characteristics
    5. 6.5 Switching Characteristics
    6. 6.6 Operating Characteristics
    7. 6.7 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Balanced CMOS Push-Pull Outputs
      2. 8.3.2 TTL-Compatible CMOS Inputs
      3. 8.3.3 Clamp Diode Structure
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Power Considerations
        2. 9.2.1.2 Input Considerations
        3. 9.2.1.3 Output Considerations
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 サポート・リソース
    3. 12.3 Trademarks
    4. 12.4 静電気放電に関する注意事項
    5. 12.5 用語集
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

TTL-Compatible CMOS Inputs

TTL-Compatible CMOS inputs are high impedance and are typically modeled as a resistor from the input to ground in parallel with the input capacitance given in the GUID-73C3CD82-C52A-4B0F-A527-6CBE4EFFAF31.html#GUID-73C3CD82-C52A-4B0F-A527-6CBE4EFFAF31. The worst case resistance is calculated with the maximum input voltage, given in the GUID-172FD3DA-F0B2-4490-8CC7-F049321F0FD7.html#GUID-172FD3DA-F0B2-4490-8CC7-F049321F0FD7, and the maximum input leakage current, given in the GUID-73C3CD82-C52A-4B0F-A527-6CBE4EFFAF31.html#GUID-73C3CD82-C52A-4B0F-A527-6CBE4EFFAF31, using ohm's law (R = V ÷ I).

Signals applied to the inputs need to have fast edge rates, as defined by Δt/Δv in the GUID-053D1AA2-AD86-4113-ABB3-6E4ECEA601E2.html#GUID-053D1AA2-AD86-4113-ABB3-6E4ECEA601E2 to avoid excessive current consumption and oscillations. If a slow or noisy input signal is required, a device with a Schmitt-trigger input should be used to condition the input signal prior to the TTL-compatible CMOS input.

TTL-Compatible CMOS inputs have a lower threshold voltage than standard CMOS inputs to allow for compatibility with older bipolar logic devices. See the GUID-053D1AA2-AD86-4113-ABB3-6E4ECEA601E2.html#GUID-053D1AA2-AD86-4113-ABB3-6E4ECEA601E2 for the valid input voltages for the CD74HCT20.