JAJSO20D February   1998  – February 2022 CD54HC166 , CD54HCT166 , CD74HC166 , CD74HCT166

PRODUCTION DATA  

  1. 1 特長
  2. 2 概要
  3. 3 Revision History
  4. 4 Pin Configuration and Functions
  5. 5 Specifications
    1. 5.1 Absolute Maximum Ratings (1)
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Thermal Information
    4. 5.4 Electrical Characteristics
    5. 5.5 Prerequisite for Switching Characteristics
    6. 5.6 Switching Characteristics
  6. 6 Parameter Measurement Information
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Device Functional Modes
  8. 8 Power Supply Recommendations
  9. 9 Layout
    1. 9.1 Layout Guidelines
  10. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 サポート・リソース
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • N|16
  • D|16
サーマルパッド・メカニカル・データ
発注情報

5.6 Switching Characteristics

Input tr, tf = 6 ns. Unless otherwise specified, CL = 50pF. See (Parameter Measurement Information)
PARAMETER VCC (V) 25℃ -40℃ to 85℃ -55℃ to 125℃ UNIT
TYP MAX MAX MAX
HC TYPES
tpd

Clock to output

 2 160 200 240 ns
4.5 13(3) 32 40 48 ns
6 27 34 41 ns
tt Output transition time 2 75 95 110 ns
4.5 15 19 22 ns
6 13 16 19 ns
tPHL Propagation delay MR to output 2 160 200 240 ns
4.5 32 40 48 ns
6 27 34 41 ns
CI Input capacitance 10 10 10 pF
CPD Power dissipation capacitance(1)(2) 5 41 pF
HCT TYPES
tpd Clock to output 4.5 40 50 60 ns
tt Output transition time 4.5 15 19 22 ns
tPHL

Propagation delay

MR to output

 4.5 40 50 60 ns
CI Input capacitance 10 10 10 pF
(1) CPD is used to determine the dynamic power consumption, per gate.
(2) PD = CPD VCC2fi + Σ (CL VCC2 + fO) where fi = Input Frequency, fO = Output Frequency, CL = Output Load Capacitance, VCC = Supply Voltage.
(3) CL = 15 and VCC = 5 V.