JAJSOZ3B November   1998  – July 2022 CD54HC245 , CD54HCT245 , CD74HC245 , CD74HCT245

PRODUCTION DATA  

  1. 1 特長
  2. 2 概要
  3. 3 Revision History
  4. 4 Pin Configuration and Functions
  5. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Thermal Information
    4. 5.4 Electrical Characteristics
    5. 5.5 Switching Characteristics
  6. 6 Parameter Measurement Information
  7. 7 Detailed Description
    1. 7.1 Overview
    2.     14
    3. 7.2 Device Functional Modes
  8. 8 Power Supply Recommendations
  9. 9 Layout
    1. 9.1 Layout Guidelines
  10. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • N|20
  • DW|20
サーマルパッド・メカニカル・データ
発注情報

5.4 Electrical Characteristics

PARAMETER TEST CONDITIONS(1) VCC(V) 25°C -40°C to 85°C -55°C to 125°C UNIT
MIN TYP MAX MIN MAX MIN MAX
HC TYPES
VIH High-level input voltage 2 1.5 1.5 1.5 V
4.5 3.15 3.15 3.15 V
6 4.2 4.2 4.2 V
VIL Low-level input voltage 2 0.5 0.5 0.5 V
4.5 1.35 1.35 1.35 V
6 1.8 1.8 1.8 V
VOH High-level output voltage

CMOS loads

 IOH = – 20 μA 2 1.9 1.9 1.9 V
IOH = – 20 μA 4.5 4.4 4.4 4.4 V
IOH = – 20 μA 6 5.9 5.9 5.9 V
High-level output voltage

TTL loads

 IOH = – 4 mA 4.5 3.98 3.84 3.7 V
IOH = – 5.2 mA 6 5.48 5.48 5.2 V
VOL Low-level output voltage

CMOS loads

 IOL = 20 μA 2 0.1 0.1 0.1 V
IOL = 20 μA 4.5 0.1 0.1 0.1 V
IOL = 20 μA 6 0.1 0.1 0.1 V
Low-level output voltage

TTL

 IOL = 4 mA 4.5 0.26 0.33 0.4 V
IOL = 5.2 mA 6 0.26 0.33 0.4 V
II Input leakage current VI = VCC or GND 6 ±0.1 ±1 ±1 µA
ICC Quiescent device current VI = VCC or GND 6 8 80 160 µA
IOZ Three-state leakage current VO = VCC or GND 6 ±0.5 ±5 ±10 µA
HCT TYPES
VIH High-level input voltage 4.5 to 5.5 2 2 2 V
VIL Low-level input voltage 4.5 to 5.5 0.8 0.8 0.8 V
VOH High-level output voltage

CMOS loads

 IOH = – 20 μA 4.5 4.4 4.4 4.4 V
High-level output voltage

TTL

 IOH = – 4 mA 4.5 3.98 3.84 3.7 V
VOL Low-level output voltage

CMOS

 IOL = 20 μA 4.5 0.1 0.1 0.1 V
Low-level output voltage

TTL

 IOH = 4 mA 4.5 0.26 0.33 0.4 V
II Input leakage current VI = VCC and GND 5.5 ±0.1 ±1 ±1 µA
ICC Quiescent device current VI = VCC and GND 5.5 8 80 160 µA
IOZ Three-state leakage current VO = VCC or GND 6 ±0.5 ±5 ±10 µA
∆ICC(1) Additional quiescent device current per input pin An or Bn input held at VCC – 2.1 V 4.5 to 5.5 100 144 180 196 µA
OE input held at VCC – 2.1 V 4.5 to 5.5 100 540 675 735 µA
DIR input held at VCC – 2.1 V 4.5 to 5.5 100 324 405 441 µA
(1) For dual-supply systems theoretical worst case (VI = 2.4V, VCC = 5.5V) specification is 1.8mA