JAJSNS7E January   1998  – October 2022 CD54HC540 , CD54HC541 , CD54HCT541 , CD74HC540 , CD74HC541 , CD74HCT540 , CD74HCT541

PRODUCTION DATA  

  1. 特長
  2. 概要
  3. Revision History
  4. Pin Configuration and Functions
  5. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Thermal Information
    4. 5.4 Electrical Characteristics
    5. 5.5 Switching Characteristics
  6. Parameter Measurement Information
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Device Functional Modes
  8. Power Supply Recommendations
  9. Layout
    1. 9.1 Layout Guidelines
  10. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 サポート・リソース
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • N|20
  • DW|20
サーマルパッド・メカニカル・データ
発注情報

Parameter Measurement Information

tpd is the maximum between tPLH and tPHL

tt is the maximum between tTLH and tTHL

GUID-20210908-SS0I-KS1W-B8X0-23BJ273MJ2QQ-low.pngFigure 6-1 HC Transition Times and Propagation Delay Times, Combination Logic
GUID-20210908-SS0I-DT0Z-F3PX-B0BZZMPVNPTD-low.pngFigure 6-3 HC Three-State Propagation Delay Waveform
GUID-20210908-SS0I-5ZHW-5RHL-LG2Q6XJTJZX5-low.png
Open drain waveforms tPLZ and tPZL are the same as those for three-state shown on the left. The test circuit is Output RL = 1kΩ to VCC, CL = 50 pF.
Figure 6-5 HC and HCT Three-State Propagation Delay Test Circuit
GUID-20210908-SS0I-KZ1M-HCJC-KNT8VX2FCW6C-low.pngFigure 6-2 HCT Transition Times and Propagation Delay Times, combination Logic
GUID-20210908-SS0I-1WM4-KTS7-WJJKDHLKN77S-low.pngFigure 6-4 HCT Three-State Propagation Delay Waveform