SLPS393A October   2013  – January 2015 CSD17571Q2

PRODUCTION DATA.  

  1. 1Features
  2. 2Applications
  3. 3Description
  4. 4Revision History
  5. 5 Specifications
    1. 5.1 Electrical Characteristics
    2. 5.2 Thermal Information
    3. 5.3 Typical MOSFET Characteristics
  6. 6Device and Documentation Support
    1. 6.1 Trademarks
    2. 6.2 Electrostatic Discharge Caution
    3. 6.3 Glossary
  7. 7Mechanical, Packaging, and Orderable Information
    1. 7.1 Q2 Package Dimensions
      1. 7.1.1 Recommended PCB Pattern
      2. 7.1.2 Recommended Stencil Pattern
    2. 7.2 Q2 Tape and Reel Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • DQK|6
サーマルパッド・メカニカル・データ
発注情報

5 Specifications

5.1 Electrical Characteristics

TA = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
STATIC CHARACTERISTICS
BVDSS Drain-to-Source Voltage VGS = 0 V, ID = 250 μA 30 V
IDSS Drain-to-Source Leakage Current VGS = 0 V, VDS = 24 V 1 μA
IGSS Gate-to-Source Leakage Current VDS = 0 V, VGS = 20 V 100 nA
VGS(th) Gate-to-Source Threshold Voltage VDS = VGS, IDS = 250 μA 1.3 1.6 2 V
RDS(on) Drain-to-Source On-Resistance VGS = 4.5 V, IDS = 5 A 24 29
VGS = 10 V, IDS = 5 A 20 24
gƒs Transconductance VDS = 15 V, IDS = 5 A 43 S
DYNAMIC CHARACTERISTICS
CISS Input Capacitance VGS = 0 V, VDS = 15 V, ƒ = 1 MHz 360 468 pF
COSS Output Capacitance 101 131 pF
CRSS Reverse Transfer Capacitance 9 12 pF
Rg Series Gate Resistance 3.8 7.6 Ω
Qg Gate Charge Total (4.5 V) VDS = 15 V, IDS = 5 A 2.4 3.1 nC
Qgd Gate Charge – Gate-to-Drain 0.6 nC
Qgs Gate Charge Gate-to-Source 0.9 nC
Qg(th) Gate Charge at Vth 0.6 nC
QOSS Output Charge VDS = 15 V, VGS = 0 V 3.4 nC
td(on) Turn On Delay Time VDS = 15 V, VGS = 4.5 V, IDS = 5 A
RG = 2 Ω
5.3 ns
tr Rise Time 19 ns
td(off) Turn Off Delay Time 8 ns
tƒ Fall Time 2.6 ns
DIODE CHARACTERISTICS
VSD Diode Forward Voltage IDS = 5 A, VGS = 0 V 0.8 1 V
Qrr Reverse Recovery Charge VDD = 15 V, IF = 5 A, di/dt = 300 A/μs 2.3 nC
trr Reverse Recovery Time 11 ns

5.2 Thermal Information

TA = 25°C unless otherwise specified
THERMAL METRIC MIN TYP MAX UNIT
RθJC Junction-to-Case Thermal Resistance(1) 6.2 °C/W
RθJA Junction-to-Ambient Thermal Resistance(1)(2) 65
(1) RθJC is determined with the device mounted on a 1 inch2 (6.45 cm2), 2 oz. (0.071 mm thick) Cu pad on a 1.5 inches × 1.5 inches
(3.81 cm × 3.81 cm), 0.06 inch (1.52 mm) thick FR4 PCB. RθJC is specified by design, whereas RθJA is determined by the user’s board design.
(2) Device mounted on FR4 material with 1 inch2 (6.45 cm2), 2 oz. (0.071 mm thick) Cu.
M0164-01_LPS235.gif
Max RθJA = 65 when mounted on 1 inch2 (6.45 cm2) of 2 oz.
(0.071 mm thick) Cu.
M0164-02_LPS235.gif
Max RθJA = 235 when mounted on minimum pad area of 2 oz.
(0.071 mm thick) Cu.

5.3 Typical MOSFET Characteristics

TA = 25°C unless otherwise specified
graph01_SLPS393.png
Figure 1. Transient Thermal Impedance
graph02_SLPS393.png
Figure 2. Saturation Characteristics
graph04_SLPS393.png
Figure 4. Gate Charge
graph06_SLPS393.png
Figure 6. Threshold Voltage vs Temperature
graph08_SLPS393A.png
Figure 8. Normalized On-State Resistance vs Temperature
graph10_SLPS393.png
Figure 10. Maximum Safe Operating Area
graph12_SLPS393.png
Figure 12. Maximum Drain Current vs Temperature
graph03_SLPS393.png
Figure 3. Transfer Characteristics
graph05_SLPS393.png
Figure 5. Capacitance
graph07_SLPS393.png
Figure 7. On-State Resistance vs Gate-to-Source Voltage
graph09_SLPS393.png
Figure 9. Typical Diode Forward Voltage
graph11_SLPS393.png
Figure 11. Single Pulse Unclamped Inductive Switching