SNAS395F
December 2007 – October 2016
DAC121C081
,
DAC121C085
PRODUCTION DATA.
1
Features
2
Applications
3
Description
4
Revision History
5
Description (continued)
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
AC and Timing Characteristics
7.7
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
DAC Section
8.3.2
Output Amplifier
8.3.3
Reference Voltage
8.3.4
Serial Interface
8.3.4.1
Basic I2C Protocol
8.3.4.2
Standard-Fast Mode
8.3.4.3
High-Speed (Hs) Mode
8.3.4.4
I2C Slave (Hardware) Address
8.3.5
Power-On Reset
8.3.6
Simultaneous Reset
8.3.7
Additional Timing Information: toutz
8.4
Device Functional Modes
8.4.1
Power-Down Modes
8.5
Programming
8.5.1
Writing to the DAC Register
8.5.2
Reading from the DAC Register
8.6
Registers
8.6.1
DAC Register
9
Application and Implementation
9.1
Application Information
9.1.1
Bipolar Operation
9.1.2
DSP/Microprocessor Interfacing
9.1.2.1
Interfacing to the 2-wire Bus
9.1.2.2
Interfacing to a Hs-mode Bus
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curve
10
Power Supply Recommendations
10.1
Using References as Power Supplies
10.1.1
LM4132
10.1.2
LM4050
10.1.3
LP3985
10.1.4
LP2980
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Device Support
12.1.1
Device Nomenclature
12.1.1.1
Specification Definitions
12.2
Documentation Support
12.2.1
Related Documentation
12.3
Related Links
12.4
Trademarks
12.5
Electrostatic Discharge Caution
12.6
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DDC|6
MPDS124I
NGF|6
MPDS394
Thermal pad, mechanical data (Package|Pins)
Orderable Information
snas395f_oa
snas395f_pm