JAJSCY4D December 2016 – December 2023 DAC38RF80 , DAC38RF83 , DAC38RF84 , DAC38RF85 , DAC38RF90 , DAC38RF93
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When using the dual DUC modes, the outputs of the two AQM blocks are summed together to form a composite signal for the DAC output, configured by field OUTSUM_SEL in register OUTSUM (7.5.22). The input signals to the DUCs much be scaled such that the signal does not exceed fullscale during summation. This field can also be configures to add the signals from the adjacent multi-DUC to enable a four DUC signal.
To avoid overflow, a rounding operation is performed after the addition to reduce the word size back to 16 bits. Exact number of bits rounded depends on the number of channels added. Table 7-39 shows the description of round after the addition.
# of channels added | # of bits rounded |
---|---|
0 | Output is 0 |
1 | 0, Use bits[15:0] from result |
2 | 1, Use bits[16:1] from result and bit[0] used for rounding |
3 or 4 | 2, Use bits[17:2] from result and bits[1:0] used for rounding |