JAJSJH8A データシート | TI.com

JAJSJH8A October 2020 – May 2021 DAC61402 , DAC81402

PRODUCTION DATA

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）

RHB|32
- MPQF130D

サーマルパッド・メカニカル・データ

RHB|32
- QFND029X

発注情報

7.13 Typical Characteristics

at T_A = 25°C, DV_DD = 5.0 V, IOV_DD = 1.8 V, internal reference enabled, unipolar ranges: AV_SS = 0 V and AV_DD ≥ V_MAX + 1.5 V for the DAC range, bipolar ranges: AV_SS ≤ V_MIN − 1.5 V and AV_DD ≥ V_MAX + 1.5 V for the DAC range, and DAC outputs unloaded (unless otherwise noted)

Figure 7-3 DAC81402 INL vs Digital Input Code
(Bipolar Outputs)

Figure 7-5 DAC81402 DNL vs Digital Input Code
(Bipolar Outputs)

Figure 7-7 DAC81402 TUE vs Digital Input Code
(Bipolar Outputs)

Figure 7-9 DAC61402 INL vs Digital Input Code
(Bipolar Outputs)

Figure 7-11 DAC61402 DNL vs Digital Input Code
(Bipolar Outputs)

Figure 7-13 DAC61402 TUE vs Digital Input Code
(Bipolar Outputs)

Figure 7-15 DAC81402 INL vs Temperature

Figure 7-17 DAC61402 INL vs Temperature

Figure 7-19 TUE vs Temperature

Figure 7-21 Unipolar Zero Code Error vs Temperature

Figure 7-23 Bipolar Zero Error vs Temperature

Figure 7-25 Full-Scale Error vs Temperature

Figure 7-27 Supply Current (AI_DD, AI_SS)
vs Digital Input Code

DAC range: ±20 V

Figure 7-29 Supply Current vs Temperature

Figure 7-31 Headroom and Footroom from Supply
vs Output Current

DAC range: ±10 V

Figure 7-33 Full-Scale Settling Time, Rising Edge

DAC range: ±20 V

Figure 7-35 DAC Output Enable Glitch

DAC range: ±10 V

Figure 7-37 Glitch Impulse, 1 LSB Step,
Falling Edge

Figure 7-39 Power-Down Response

DAC range: 0 V to 5 V, midscale code

Figure 7-41 DAC Output Noise Density vs Frequency

Figure 7-43 Internal Reference Voltage vs Temperature

Figure 7-45 Internal Reference Voltage vs Time

Figure 7-47 Internal Reference Noise

Figure 7-4 DAC81402 INL vs Digital Input Code
(Unipolar Outputs)

Figure 7-6 DAC81402 DNL vs Digital Input Code
(Unipolar Outputs)

Figure 7-8 DAC81402 TUE vs Digital Input Code
(Unipolar Outputs)

Figure 7-10 DAC61402 INL vs Digital Input Code
(Unipolar Outputs)

Figure 7-12 DAC61402 DNL vs Digital Input Code
(Unipolar Outputs)

Figure 7-14 DAC61402 TUE vs Digital Input Code
(Unipolar Outputs)

Figure 7-16 DAC81402 DNL vs Temperature

Figure 7-18 DAC61402 DNL vs Temperature

Figure 7-20 Unipolar Offset Error vs Temperature

Figure 7-22 Bipolar Zero Code Error vs Temperature

Figure 7-24 Gain Error vs Temperature

Figure 7-26 Supply Current (DI_DD)
vs Digital Input Code

Figure 7-28 Supply Current (I_IOVDD)
vs Supply Voltage

DAC range: ±20 V

Figure 7-30 Power-Down Current vs Temperature

Figure 7-32 Source and Sink Capability

DAC range: ±10 V

Figure 7-34 Full-Scale Settling Time, Falling Edge

DAC range: ±10 V

Figure 7-36 Glitch Impulse, 1 LSB Step,
Rising Edge

Figure 7-38 Power-Up Response

DAC range: ±20 V

Figure 7-40 Clear Command Response

DAC range: 0 V to 5 V, midscale code

Figure 7-42 DAC Output Noise

Figure 7-44 Internal Reference Voltage
vs Supply Voltage

Figure 7-46 Internal Reference Noise Density vs Frequency

Figure 7-48 Internal Reference Temperature Drift Histogram