JAJSK99B February 2022 – December 2023 DLP2021-Q1
PRODUCTION DATA
Once data is loaded onto the DMD, the mirrors switch position (+12° or –12°) based on the timing signal sent to the DMD Mirror and SRAM control logic. The DMD mirrors will be switched from OFF to ON or ON to OFF, or stay in the same position based on control signals DAD_BUS, RESET_STROBE, SAC_BUS, and SAC_CLK, which are coordinated with the data loading by the DLP controller. In general, the DLP controller loads the DMD SRAM memory cells over the DDR interface, and then commands to the micromirrors to switch position.
At power down, the DMD Mirrors are commanded by the DLP controller to move to a near flat (0°) position as shown in Section 9. The flat state position of the DMD mirrors are referred to as the “Parked” state. To maintain long-term DMD reliability, the DMD must be properly “Parked” prior to every power down of the DMD power supplies.