JAJSFJ1 May   2018 DLPA4000

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      システム・ブロック図
  4. 改訂履歴
  5. 概要(続き)
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 SPI Timing Parameters
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Description
    3. 8.3 Feature Description
      1. 8.3.1 Supply and Monitoring
        1. 8.3.1.1 Supply
        2. 8.3.1.2 Monitoring
          1. 8.3.1.2.1 Block Faults
          2. 8.3.1.2.2 Low Battery and UVLO
          3. 8.3.1.2.3 Thermal Protection
      2. 8.3.2 Illumination
        1. 8.3.2.1 Programmable Gain Block
        2. 8.3.2.2 LDO Illumination
        3. 8.3.2.3 Illumination Driver A
        4. 8.3.2.4 External MOSFETs
          1. 8.3.2.4.1 Gate series resistor (RG)
          2. 8.3.2.4.2 Gate series diode (DG)
          3. 8.3.2.4.3 Gate parallel capacitance (CG)
        5. 8.3.2.5 RGB Strobe Decoder
          1. 8.3.2.5.1 Break Before Make (BBM)
          2. 8.3.2.5.2 Openloop Voltage
          3. 8.3.2.5.3 Transient Current Limit
        6. 8.3.2.6 Illumination Monitoring
          1. 8.3.2.6.1 Power Good
          2. 8.3.2.6.2 RatioMetric Overvoltage Protection
      3. 8.3.3 External Power MOSFET Selection
        1. 8.3.3.1 Threshold Voltage
        2. 8.3.3.2 Gate Charge and Gate Timing
        3. 8.3.3.3 On-resistance RDS(on)
      4. 8.3.4 DMD Supplies
        1. 8.3.4.1 LDO DMD
        2. 8.3.4.2 DMD HV Regulator
        3. 8.3.4.3 DMD/DLPC Buck Converters
        4. 8.3.4.4 DMD Monitoring
          1. 8.3.4.4.1 Power Good
          2. 8.3.4.4.2 Overvoltage Fault
      5. 8.3.5 Buck Converters
        1. 8.3.5.1 LDO Bucks
        2. 8.3.5.2 General Purpose Buck Converters
        3. 8.3.5.3 Buck Converter Monitoring
          1. 8.3.5.3.1 Power Good
          2. 8.3.5.3.2 Overvoltage Fault
      6. 8.3.6 Auxiliary LDOs
      7. 8.3.7 Measurement System
    4. 8.4 Device Functional Modes
    5. 8.5 Programming
      1. 8.5.1 SPI
      2. 8.5.2 Interrupt
      3. 8.5.3 Fast-Shutdown in Case of Fault
      4. 8.5.4 Protected Registers
      5. 8.5.5 Writing to EEPROM
    6. 8.6 Register Maps
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Component Selection for General-Purpose Buck Converters
    3. 9.3 System Example With DLPA4000 Internal Block Diagram
  10. 10Power Supply Recommendations
    1. 10.1 Power-Up and Power-Down Timing
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 LED Driver
        1. 11.1.1.1 PowerBlock Gate Control Isolation
        2. 11.1.1.2 VIN to PowerBlocks
        3. 11.1.1.3 Return Current from LEDs and RSense
        4. 11.1.1.4 RC Snubber
        5. 11.1.1.5 Capacitor Choice
      2. 11.1.2 General Purpose Buck 2
      3. 11.1.3 SPI Connections
      4. 11.1.4 RLIM Routing
      5. 11.1.5 LED Connection
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 デバイス・サポート
      1. 12.1.1 デバイスの項目表記
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 コミュニティ・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報
    1. 13.1 Package Option Addendum
      1. 13.1.1 Packaging Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Layout Example

Figure 33 shows an example of a proper buck converter layout. It shows the routing and placing of the components near the DLPA4000 for optimal performance. A register sets the output voltage of the converters used by the DLPA4000. The DLPA4000 uses the feedback pin to compare the output voltage with an internal setpoint.

DLPA4000 Practical_Layout.gifFigure 33. Practical Layout Example

Use short traces. Separate individual power grounds to avoid ground shift problems. Ground shift problems occur when ground currents of different buck converters interfere. High currents flow through the inductor (L7) and the output capacitors (C130, C131).Make the traces to and from inductor and capacitors as short as possible to avoid losses due to trace resistance. Use high-quality capacitors with a low ESR value to minimize losses in the capacitors and to maintain an acceptable amount of voltage ripple.

In order to prevent problems with switching high currents at high frequencies the layout is very critical and snubber networks are advisable. The switching frequency can vary from several hundreds of kHz to frequencies in the MHz range. Keep in mind that it takes only nanoseconds to switch currents from zero to several amperes which is equivalent to even much higher frequencies. Those switching moments causes EMI problems if not properly handled, especially when ringing occurs on the edges, which can have higher amplitude and frequency as the switching voltage itself. To prevent this ringing the DLPA4000 buck converters all need a snubber network, consisting of a resistor and a capacitor in series implemented on the board to reduce this unwanted behavior. The snubber network is in this case placed on the bottom-side of the PCB (thus not visible here) connected to the trace of L9 routing to the switch node.

In order to make more clear what plays a role when laying out a buck converter, this paragraph explains the connections and placing of the parts around the buck converter connected to the pins 50-54. The supply voltage is connected to pin 52 which is laid out on a mid layer (purple colored) and is connected to this pin using 3 via’s to make sure a stable and low resistance connection is made. The decoupling is done by capacitor C43 & C44 visible on the bottom right of Figure 33 and the connection to the supply and the ground layer is done using multiple vias. The ground connection on pin 54 is also done using multiple vias to the ground layer which is visible as the blue areas in Figure 33. By using different layers it is possible to create low resistive paths. Ideally the ground connection of the output capacitors and the ground connection of the part (pin54) should be close together. The layout connects both points together using a wide trace on the bottom layer (blue colored area) which is also suitable to bring both connections together. All buck converters in the layout have the same layout structure and use a separated ground trace to their respective ground connection on the part. All these ground connections are connected together on the ground plane below the DLPA4000 itself. shows the position of the converter inductor and its accompanying capacitors (L9 & C46, C47) as close as possible positioned to the pins 51 and 53 using traces as thick as possible. The ground connections of these capacitors is done using multiple via’s to the ground layer to ensure a low resistance path.